公开(公告)号：US06621166B2

公开(公告)日：2003-09-16

申请号：US09860304

申请日：2001-05-18

Applicant: Lawrence Kulinsky

Inventor： Lawrence Kulinsky

IPC: H01L2348

CPC classification number: H05K1/112 ,  B32B15/08 ,  C09J7/29 ,  C09J2201/128 ,  C09J2203/326 ,  C09J2400/166 ,  H01L23/4985 ,  H01L23/49894 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/10253 ,  H01L2924/13091 ,  H05K1/189 ,  H05K2201/0195 ,  H05K2201/09472 ,  Y10T156/1082 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A novel five-layer tape is provided for applications such as bonding, interconnection and insulation of different parts of a semiconductor package at the same time. The five layer tape includes a metal conductive layer that is sandwiched between two insulative layers, that are themselves in turn sandwiched by two adhesive layers. Windows cut into the insulative and adhesive layers on either the top or bottom of the tape permit electrical connection to the metallic conductive layer. The tape may be made from two insulation sheets that have an adhesive layer and a metallic interconnect. In turn, the tape enables the manufacturer to overcome physical limitations in forming conduction paths, including permitting the connection of multiple die where the terminals of the one die are obscured by the other die.

Abstract translation: 为同时提供半导体封装的不同部件的接合，互连和绝缘等应用提供了一种新颖的五层带。 五层带包括夹在两个绝缘层之间的金属导电层，它们本身又被两个粘合剂层夹在中间。 切割成胶带的顶部或底部的绝缘层和粘合剂层的窗户允许电连接到金属导电层。 带可以由具有粘合剂层和金属互连的两个绝缘片制成。 反过来，带子使得制造商能够克服形成传导路径的物理限制，包括允许多个管芯的连接，其中一个管芯的端子被另一个管芯模糊。

公开(公告)号：US20110203936A1

公开(公告)日：2011-08-25

申请号：US13029899

申请日：2011-02-17

Applicant: Lawrence Kulinsky ,  Marc J. Madou

Inventor： Lawrence Kulinsky ,  Marc J. Madou

IPC: C25D5/02 ,  C25D5/16

CPC classification number: C25D5/02 ,  B33Y10/00 ,  C25D1/003 ,  C25D13/04

Abstract: A method of forming three-dimensional structures includes forming a conductive layer on a substrate and patterning a resist layer over the conductive layer, the resist layer having contained therein a plurality of vias. An electrically conductive polymer is then electro-deposited in the vias. The electro-deposition operation is then stopped to form one or more of posts, posts having bulbous termini (i.e., mushrooms), or a layer atop the resist layer. The resist may be removed to yield the structure which may be further processed. For example, the structure may be pyrolyzed. In addition, biomolecules may also be adhered or otherwise affixed to the structure.

Abstract translation: 形成三维结构的方法包括在衬底上形成导电层并在导电层上形成抗蚀剂层，抗蚀剂层中包含多个通孔。 然后将导电聚合物电沉积在通孔中。 然后停止电沉积操作以形成一个或多个具有球根末端（即蘑菇）的柱，或者在抗蚀剂层顶上的层。 可以除去抗蚀剂以产生可进一步加工的结构。 例如，该结构可以被热解。 此外，生物分子也可以附着或以其他方式固定在结构上。

公开(公告)号：US07525178B2

公开(公告)日：2009-04-28

申请号：US11586130

申请日：2006-10-25

Applicant: Lawrence Kulinsky

Inventor： Lawrence Kulinsky

IPC: H01L23/58

CPC classification number: H01L29/7811 ,  H01L29/0619 ,  H01L29/0638 ,  H01L29/402 ,  H01L29/7823 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A termination region of a semiconductor die is provided, which includes one or more field rings arranged in the termination region, one or more metal field plates, and an insulation layer disposed to prevent direct electrical contact between the field rings and the field plate such that the at least one field ring is capacitively coupled with the at least one field plate. Such a termination region may also include a polysilicon plate capacitively coupled with a diffusion region laterally spaced from the field rings, the polysilicon plate being located at an outer surface or directly under a passivation layer at an outer surface of the die. The termination region may also include floating field rings. The insulation layer may be a field oxide layer.

Abstract translation: 提供半导体管芯的终端区域，其包括布置在端接区域中的一个或多个场环，一个或多个金属场板和设置成防止场环与场板之间的直接电接触的绝缘层，使得 所述至少一个场环与所述至少一个场板电容耦合。 这种终止区域还可以包括与与场环横向间隔开的扩散区电容耦合的多晶硅板，多晶硅板位于管芯的外表面处的外表面或钝化层的正下方。 终端区域还可以包括浮动环。 绝缘层可以是场氧化物层。

公开(公告)号：US08641883B2

公开(公告)日：2014-02-04

申请号：US13029899

申请日：2011-02-17

Applicant: Lawrence Kulinsky ,  Marc J. Madou

Inventor： Lawrence Kulinsky ,  Marc J. Madou

IPC: C25D5/02 ,  C25D5/16

CPC classification number: C25D5/02 ,  B33Y10/00 ,  C25D1/003 ,  C25D13/04

Abstract: A method of forming three-dimensional structures includes forming a conductive layer on a substrate and patterning a resist layer over the conductive layer, the resist layer having contained therein a plurality of vias. An electrically conductive polymer is then electro-deposited in the vias. The electro-deposition operation is then stopped to form one or more of posts, posts having bulbous termini (i.e., mushrooms), or a layer atop the resist layer. The resist may be removed to yield the structure which may be further processed. For example, the structure may be pyrolyzed. In addition, biomolecules may also be adhered or otherwise affixed to the structure.

Abstract translation: 形成三维结构的方法包括在衬底上形成导电层并在导电层上形成抗蚀剂层，抗蚀剂层中包含多个通孔。 然后将导电聚合物电沉积在通孔中。 然后停止电沉积操作以形成一个或多个具有球根末端（即蘑菇）的柱，或者在抗蚀剂层顶上的层。 可以除去抗蚀剂以产生可进一步加工的结构。 例如，该结构可以被热解。 此外，生物分子也可以附着或以其他方式固定在结构上。

公开(公告)号：US20070090492A1

公开(公告)日：2007-04-26

申请号：US11586130

申请日：2006-10-25

Applicant: Lawrence Kulinsky

Inventor： Lawrence Kulinsky

IPC: H01L23/58

CPC classification number: H01L29/7811 ,  H01L29/0619 ,  H01L29/0638 ,  H01L29/402 ,  H01L29/7823 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A termination region of a semiconductor die is provided, which includes one or more field rings arranged in the termination region, one or more metal field plates, and an insulation layer disposed to prevent direct electrical contact between the field rings and the field plate such that the at least one field ring is capacitively coupled with the at least one field plate. Such a termination region may also include a polysilicon plate capacitively coupled with a diffusion region laterally spaced from the field rings, the polysilicon plate being located at an outer surface or directly under a passivation layer at an outer surface of the die. The termination region may also include floating field rings. The insulation layer may be a field oxide layer.

Abstract translation: 提供半导体管芯的终端区域，其包括布置在端接区域中的一个或多个场环，一个或多个金属场板和设置成防止场环与场板之间的直接电接触的绝缘层，使得 所述至少一个场环与所述至少一个场板电容耦合。 这种终止区域还可以包括与与场环横向间隔开的扩散区电容耦合的多晶硅板，多晶硅板位于管芯的外表面处的外表面或钝化层的正下方。 终端区域还可以包括浮动环。 绝缘层可以是场氧化物层。

公开(公告)号：US06768211B2

公开(公告)日：2004-07-27

申请号：US10633752

申请日：2003-08-04

Applicant: Lawrence Kulinsky

Inventor： Lawrence Kulinsky

IPC: H01L23495

CPC classification number: H05K1/112 ,  B32B15/08 ,  C09J7/29 ,  C09J2201/128 ,  C09J2203/326 ,  C09J2400/166 ,  H01L23/4985 ,  H01L23/49894 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/10253 ,  H01L2924/13091 ,  H05K1/189 ,  H05K2201/0195 ,  H05K2201/09472 ,  Y10T156/1082 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A novel five-layer tape is provided for applications such as bonding, interconnection and insulation of different parts of a semiconductor package at the same time. The five layer tape includes a metal conductive layer that is sandwiched between two insulative layers, that are themselves in turn sandwiched by two adhesive layers. Windows cut into the insulative and adhesive layers on either the top or bottom of the tape permit electrical connection to the metallic conductive layer. The tape may be made from two insulation sheets that have an adhesive layer and a metallic interconnect. In turn, the tape enables the manufacturer to overcome physical limitations in forming conduction paths, including permitting the connection of multiple die where the terminals of the one die are obscured by the other die.

Abstract translation: 为同时提供半导体封装的不同部件的接合，互连和绝缘等应用提供了一种新颖的五层带。 五层带包括夹在两个绝缘层之间的金属导电层，它们本身又被两个粘合剂层夹在中间。 切割成胶带的顶部或底部的绝缘层和粘合剂层的窗户允许电连接到金属导电层。 胶带可以由具有粘合剂层和金属互连的两个绝缘片制成。 反过来，带子使得制造商能够克服形成传导路径的物理限制，包括允许多个管芯的连接，其中一个管芯的端子被另一个管芯模糊。