公开(公告)号：US20190254160A1

公开(公告)日：2019-08-15

申请号：US16393477

申请日：2019-04-24

Applicant: Longitude Licensing Limited

Inventor： Sensho Usami

IPC: H05K1/02 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56 ,  H01L25/065 ,  H05K1/18 ,  H01L25/00 ,  H01L23/16

CPC classification number: H05K1/0271 ,  H01L21/561 ,  H01L23/16 ,  H01L23/3128 ,  H01L23/3135 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/85 ,  H01L24/92 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/06135 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/85207 ,  H01L2224/8592 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/3511 ,  H05K1/181 ,  H05K2201/10515 ,  H05K2201/2009 ,  H01L2924/00012 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00014

Abstract: One semiconductor device includes a wiring substrate, a first semiconductor chip that is mounted on one surface of the wiring substrate, a second semiconductor chip that is laminated on the first semiconductor chip so as to form exposed surfaces where the surface of the first semiconductor chip is partially exposed, silicon substrates that are mounted on the exposed surfaces and serve as warping control members, and an encapsulation body that is formed on the wiring substrate so as to cover the first semiconductor chip, the second semiconductor chip and the silicon substrates.

公开(公告)号：US10537018B2

公开(公告)日：2020-01-14

申请号：US16393477

申请日：2019-04-24

Applicant: Longitude Licensing Limited

Inventor： Sensho Usami

IPC: H05K1/02 ,  H01L23/16 ,  H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H05K1/18 ,  H01L25/18

Abstract: One semiconductor device includes a wiring substrate, a first semiconductor chip that is mounted on one surface of the wiring substrate, a second semiconductor chip that is laminated on the first semiconductor chip so as to form exposed surfaces where the surface of the first semiconductor chip is partially exposed, silicon substrates that are mounted on the exposed surfaces and serve as warping control members, and an encapsulation body that is formed on the wiring substrate so as to cover the first semiconductor chip, the second semiconductor chip and the silicon substrates.