公开(公告)号：US20030108753A1

公开(公告)日：2003-06-12

申请号：US10306650

申请日：2002-11-27

Applicant: Matsushita Electric Industrial Co., Ltd.

Inventor： Toshio Fujii ,  Tatsuo Mifune

IPC: B32B009/00

CPC classification number: H01J11/12 ,  C03C8/04 ,  C03C8/16 ,  C03C8/18 ,  H01J11/22 ,  H01J11/38 ,  H01J2211/225 ,  Y10T428/252

Abstract: A material usable for the electrodes and the dielectric layer of plasma display panels and capable of reducing the occurrence of yellowing and a high-image-quality plasma display panel using the material are provided. Using glass powder containing 25 to 50 wt % of Bi2O3, 5 to 35 wt % of B2O3, 10 to 20 wt % of ZnO, 5 to 20 wt % of BaO, 0 to 15 wt % of SiO2 and 0 to 10 wt % of Al2O3, the electrodes and the dielectric layer of a plasma display panel are formed.

Abstract translation: 提供了可用于等离子体显示面板的电极和电介质层并且能够减少黄变的发生的材料和使用该材料的高图像质量等离子体显示面板的材料。 使用含有25〜50重量％的Bi 2 O 3，5〜35重量％的B 2 O 3，10〜20重量％的ZnO，5〜20重量％的BaO，0〜15重量％的SiO 2和0〜10重量％ 形成等离子体显示面板的电极和电介质层。

公开(公告)号：US20040226744A1

公开(公告)日：2004-11-18

申请号：US10844823

申请日：2004-05-12

Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

Inventor： Toshiyuki Asahi ,  Yutaka Taguchi ,  Yasuhiro Sugaya ,  Seiichi Nakatani ,  Toshio Fujii

IPC: H05K007/06

CPC classification number: H05K1/186 ,  H01L25/165 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2224/97 ,  H01L2924/19105 ,  H05K1/115 ,  H05K3/20 ,  H05K3/4614 ,  H05K2201/09609 ,  H05K2201/09618 ,  H05K2201/10378 ,  H05K2203/061 ,  H01L2224/81 ,  H01L2224/83

Abstract: A module with a built-in circuit component of the present invention includes an electric insulating layer, a pair of wiring layers provided on both principal planes of the electric insulating layer, a plurality of via conductors electrically connecting the pair of wiring layers and passing through the electric insulating layer in a thickness direction thereof, and a circuit component buried in the electric insulating layer, wherein the plurality of via conductors are disposed in a circumferential portion of the electric insulating layer in accordance with a predetermined rule. The plurality of via conductors are placed at an interval, for example, so as to form at least one straight line, in a cut surface of the electric insulating layer in a direction parallel to a principal plane thereof.

Abstract translation: 具有本发明的内置电路部件的模块包括电绝缘层，设置在电绝缘层的两个主平面上的一对布线层，多个通孔导体，电连接该对布线层并通过 所述电绝缘层的厚度方向以及埋设在所述电绝缘层中的电路部件，其中，所述多个通孔导体按照规定的规则配置在所述电绝缘层的周向部分。 多个通孔导体例如在与绝缘层的主平面平行的方向上在电绝缘层的切割面上形成至少一条直线的间隔。