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公开(公告)号:US12072831B2
公开(公告)日:2024-08-27
申请号:US18154424
申请日:2023-01-13
Applicant: MEDIATEK INC.
Inventor: Sheng-Ya Tung
IPC: G06F13/42
CPC classification number: G06F13/4282 , G06F2213/0026
Abstract: A Dynamic Peripheral Component Interconnect Express (PCIe) speed-adjusting method is provided. The dynamic PCIe speed-adjusting method is applied to a wireless device. The dynamic PCIe speed-adjusting method may include the following step: the wireless device determines whether to change from the current PCIe speed to a target PCIe speed based on the noise level threshold, the signal-to-noise ratio (SNR) threshold, the current data-rate requirement, or a combination thereof.
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公开(公告)号:US12277022B2
公开(公告)日:2025-04-15
申请号:US18096545
申请日:2023-01-12
Applicant: MEDIATEK INC.
Inventor: Sheng-Ya Tung
IPC: G06F1/32 , G06F1/08 , G06F1/3296
Abstract: A method for adaptively adjusting state transition time in a Peripheral Component Interconnect (PCI) Express (PCIe) system and associated apparatus such as a root complex (RC) device and an endpoint device are provided. The method may include: toggling a clock request signal on a signal path coupled between the RC device and the endpoint device based on a request from the RC device or on a request from the endpoint device, wherein when the clock request signal toggles, the endpoint device transits from a first state to a second state; and toggling a reference clock signal from the RC device at a timing determined according to a training parameter among at least one predetermined parameter which is set dependent on at least one of the factors: a transition time, a restoration delay, a latency tolerance report (LTR) and a bias state, after the clock request signal toggles.
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公开(公告)号:US20240241569A1
公开(公告)日:2024-07-18
申请号:US18096545
申请日:2023-01-12
Applicant: MEDIATEK INC.
Inventor: Sheng-Ya Tung
IPC: G06F1/3296 , G06F1/08
CPC classification number: G06F1/3296 , G06F1/08
Abstract: A method for adaptively adjusting state transition time in a Peripheral Component Interconnect (PCI) Express (PCIe) system and associated apparatus such as a root complex (RC) device and an endpoint device are provided. The method may include: toggling a clock request signal on a signal path coupled between the RC device and the endpoint device based on a request from the RC device or on a request from the endpoint device, wherein when the clock request signal toggles, the endpoint device transits from a first state to a second state; and toggling a reference clock signal from the RC device at a timing determined according to a training parameter among at least one predetermined parameter which is set dependent on at least one of the factors: a transition time, a restoration delay, a latency tolerance report (LTR) and a bias state, after the clock request signal toggles.
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