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公开(公告)号：US20140061285A1
公开(公告)日：2014-03-06
申请号：US14073607
申请日：2013-11-06
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Thomas Kinsley
IPC: B23K1/00
CPC classification number: B23K1/0016 , G01R31/048 , H05K1/0268 , H05K1/111 , H05K3/3436 , H05K2201/09663 , H05K2201/09809 , H05K2201/10734 , H05K2203/163 , H05K2203/175 , Y02P70/611 , Y10T29/49004 , Y10T29/49128 , Y10T29/4913 , Y10T29/49144
Abstract: Some embodiments of the present invention are generally directed to testing connections of a memory device to a circuit board or other device. In one embodiment, a memory device that is configured to facilitate continuity testing between the device and a printed circuit board or other device is disclosed. The memory device includes a substrate and two connection pads that are electrically coupled to one another via a test path. A system and method for testing the connections between a memory device and a circuit board or other device are also disclosed, as are additional techniques for detecting excess temperature and enabling special functionalities using multi-stage connection pads.
Abstract translation: 本发明的一些实施例通常涉及测试存储器件与电路板或其它器件的连接。 在一个实施例中，公开了一种被配置为便于该设备与印刷电路板或其他设备之间的连续性测试的存储器件。 存储器件包括一个基片和两个通过测试路径彼此电耦合的连接焊盘。 还公开了用于测试存储器件和电路板或其他器件之间的连接的系统和方法，以及用于检测过温度并使得能够使用多级连接焊盘的特殊功能的附加技术。
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公开(公告)号：US09827629B2
公开(公告)日：2017-11-28
申请号：US14073607
申请日：2013-11-06
Applicant: Micron Technology, Inc.
Inventor： Thomas Kinsley
CPC classification number: B23K1/0016 , G01R31/048 , H05K1/0268 , H05K1/111 , H05K3/3436 , H05K2201/09663 , H05K2201/09809 , H05K2201/10734 , H05K2203/163 , H05K2203/175 , Y02P70/611 , Y10T29/49004 , Y10T29/49128 , Y10T29/4913 , Y10T29/49144
Abstract: Some embodiments of the present invention are generally directed to testing connections of a memory device to a circuit board or other device. In one embodiment, a memory device that is configured to facilitate continuity testing between the device and a printed circuit board or other device is disclosed. The memory device includes a substrate and two connection pads that are electrically coupled to one another via a test path. A system and method for testing the connections between a memory device and a circuit board or other device are also disclosed, as are additional techniques for detecting excess temperature and enabling special functionalities using multi-stage connection pads.
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公开(公告)号：US10717141B2
公开(公告)日：2020-07-21
申请号：US15796173
申请日：2017-10-27
Applicant: Micron Technology, Inc.
Inventor： Thomas Kinsley
Abstract: Some embodiments of the present invention are generally directed to testing connections of a memory device to a circuit board or other device. In one embodiment, a memory device that is configured to facilitate continuity testing between the device and a printed circuit board or other device is disclosed. The memory device includes a substrate and two connection pads that are electrically coupled to one another via a test path. A system and method for testing the connections between a memory device and a circuit board or other device are also disclosed, as are additional techniques for detecting excess temperature and enabling special functionalities using multi-stage connection pads.
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公开(公告)号：US20180043450A1
公开(公告)日：2018-02-15
申请号：US15796173
申请日：2017-10-27
Applicant: Micron Technology, Inc.
Inventor： Thomas Kinsley
Abstract: Some embodiments of the present invention are generally directed to testing connections of a memory device to a circuit board or other device. In one embodiment, a memory device that is configured to facilitate continuity testing between the device and a printed circuit board or other device is disclosed. The memory device includes a substrate and two connection pads that are electrically coupled to one another via a test path. A system and method for testing the connections between a memory device and a circuit board or other device are also disclosed, as are additional techniques for detecting excess temperature and enabling special functionalities using multi-stage connection pads.
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