公开(公告)号：US11855631B2

公开(公告)日：2023-12-26

申请号：US17406370

申请日：2021-08-19

Applicant: MONTAGE TECHNOLOGY CO., LTD.

Inventor： Xiong Zhang ,  Chunlai Sun ,  Juan Du ,  Gang Shi ,  Chonghe Yang

IPC: H03K19/0944 ,  H03K19/003 ,  H03K17/10 ,  H03K17/687 ,  H03K19/00

CPC classification number: H03K19/0944 ,  H03K17/102 ,  H03K17/687 ,  H03K19/0005 ,  H03K19/00315

Abstract: An asymmetrical I/O structure is provided. In one embodiment, the asymmetrical I/O structure comprises a first power supply node connected to a first voltage, a second power supply node connected to a second voltage, a pull-up unit and a pull-down unit which are connected between the first power supply node and the second power supply node. The first voltage is higher than the second voltage. A node between the pull-up unit and the pull-down unit is connected to an I/O node. The pull-up unit comprises one or more pull-up transistors, and the pull-down unit comprises one or more pull-down transistors. The number of the pull-up transistors is different from the number of the pull-down transistors.