公开(公告)号：US06924175B2

公开(公告)日：2005-08-02

申请号：US10759549

申请日：2004-01-16

Applicant: Mark Pavier ,  Tim Sammon ,  Rachel Anderson

Inventor： Mark Pavier ,  Tim Sammon ,  Rachel Anderson

IPC: H01L23/495 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC classification number: H01L23/49562 ,  H01L23/49551 ,  H01L24/48 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/48247 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor package includes a lead frame having a displaced integral strap which is cupped out of a lead frame plane to provide a nest that receives a semiconductor chip electrically connected to an inner surface of the cupped strap. The semiconductor package further has a housing molded over and encapsulating the semiconductor chip with the frame such that a surface of the semiconductor chip facing away from the cupped strip is flush with or protrudes beyond a bottom of the housing.

Abstract translation: 半导体封装包括具有位移的整体带的引线框架，其从引线框架平面中拔出，以提供接收电连接到铜带的内表面的半导体芯片的嵌套。 该半导体封装还具有模制在半导体芯片上并将其封装在框架上的壳体，使得半导体芯片的背离杯状条的表面与外壳的底部齐平或突出超出外壳的底部。

公开(公告)号：US20050006750A1

公开(公告)日：2005-01-13

申请号：US10888410

申请日：2004-07-08

Applicant: Mark Pavier ,  Tim Sammon ,  Chris Davis

Inventor： Mark Pavier ,  Tim Sammon ,  Chris Davis

IPC: H01L21/60 ,  H01L23/482 ,  H01L23/52

CPC classification number: H01L24/81 ,  H01L23/4824 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/00

Abstract: An integrated semiconductor device which includes a plurality of power semiconductor devices formed in a common semiconductor die.

Abstract translation: 一种集成半导体器件，包括形成在公共半导体管芯中的多个功率半导体器件。

公开(公告)号：US06593622B2

公开(公告)日：2003-07-15

申请号：US10138130

申请日：2002-05-02

Applicant: Daniel M. Kinzer ,  Tim Sammon ,  Mark Pavier ,  Adam I. Amali

Inventor： Daniel M. Kinzer ,  Tim Sammon ,  Mark Pavier ,  Adam I. Amali

IPC: H01L2976

CPC classification number: H01L23/4952 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/29 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6611 ,  H01L2224/37147 ,  H01L2224/37599 ,  H01L2224/40137 ,  H01L2224/45014 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/8485 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/0781 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A driver stage consisting of an N channel FET and a P channel FET are mounted in the same package as the main power FET. The power FET is mounted on a lead frame and the driver FETs are mounted variously on a separate pad of the lead frame or on the main FET or on the lead frame terminals. All electrodes are interconnected within the package by mounting on common conductive surfaces or by wire bonding. The drivers are connected to define either an inverting or non-inverting drive.

公开(公告)号：USRE41719E1

公开(公告)日：2010-09-21

申请号：US11183302

申请日：2005-07-15

Applicant: Daniel Kinzer ,  Tim Sammon ,  Mark Pavier ,  Adam Amali

Inventor： Daniel Kinzer ,  Tim Sammon ,  Mark Pavier ,  Adam Amali

IPC: H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113

CPC classification number: H01L23/4952 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/29 ,  H01L24/37 ,  H01L24/40 ,  H01L24/41 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6611 ,  H01L2224/37147 ,  H01L2224/37599 ,  H01L2224/40137 ,  H01L2224/45014 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/49111 ,  H01L2224/49175 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2224/8485 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/0781 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A driver stage consisting of an N channel FET and a P channel FET are mounted in the same package as the main power FET. The power FET is mounted on a lead frame and the driver FETs are mounted variously on a separate pad of the lead frame or on the main FET or on the lead frame terminals. All electrodes are interconnected within the package by mounting on common conductive surfaces or by wire bonding. The drivers are connected to define either an inverting or non-inverting drive.

Abstract translation: 由N沟道FET和P沟道FET组成的驱动器级与主功率FET安装在同一封装中。 功率FET安装在引线框架上，驱动器FET分别安装在引线框架或主FET或引线框架端子的独立焊盘上。 所有电极通过安装在公共导电表面上或通过引线接合在封装内互连。 驱动器连接以定义反相或非反相驱动器。

公开(公告)号：US07034344B2

公开(公告)日：2006-04-25

申请号：US10888410

申请日：2004-07-08

Applicant: Mark Pavier ,  Tim Sammon ,  Chris Davis

Inventor： Mark Pavier ,  Tim Sammon ,  Chris Davis

IPC: H01L27/02

CPC classification number: H01L24/81 ,  H01L23/4824 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/00

Abstract: An integrated semiconductor device which includes a plurality of power semiconductor devices formed in a common semiconductor die.

Abstract translation: 一种集成半导体器件，包括形成在公共半导体管芯中的多个功率半导体器件。

公开(公告)号：US20050207133A1

公开(公告)日：2005-09-22

申请号：US11078807

申请日：2005-03-11

Applicant: Mark Pavier ,  Tim Sammon

Inventor： Mark Pavier ,  Tim Sammon

IPC: G06F1/16 ,  H05K1/14 ,  H05K1/18 ,  H05K3/34

CPC classification number: H05K1/141 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/2518 ,  H01L2924/13055 ,  H01L2924/13063 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19105 ,  H05K1/185 ,  H05K3/3436 ,  H05K2201/10734 ,  H01L2924/00

Abstract: A peripheral electronic system for an electronic device including a motherboard having multiple individual electrically connected vertically stacked modules, at least one of which is a circuit board assembly including active and/or passive electronic components embedded therein with the components being electrically connected by conductive traces to provide desired operating function. The peripheral electronic system further includes an electrical connector array on an exposed surface of the composite structure to provide electrical connections between the peripheral electronic system and the motherboard.

Abstract translation: 一种用于电子设备的外围电子系统，包括具有多个单独电连接的垂直堆叠模块的母板，其中至少一个是包括嵌入其中的有源和/或无源电子元件的电路板组件，其中所述元件通过导电迹线电连接到 提供所需的操作功能。 外围电子系统还包括在复合结构的暴露表面上的电连接器阵列，以提供外围电子系统和母板之间的电连接。

公开(公告)号：US06894397B2

公开(公告)日：2005-05-17

申请号：US10260148

申请日：2002-09-27

Applicant: Mark Pavier ,  Tim Sammon

Inventor： Mark Pavier ,  Tim Sammon

IPC: H01L23/34 ,  H01L21/60 ,  H01L23/367 ,  H01L23/52 ,  H01L27/088 ,  H01L29/78 ,  H01L23/48 ,  H01L29/40

CPC classification number: H01L29/7811 ,  H01L23/3677 ,  H01L24/81 ,  H01L27/088 ,  H01L29/7809 ,  H01L29/7813 ,  H01L2224/81801 ,  H01L2924/01068 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00

Abstract: A flip chip structure contains laterally spaced semiconductor devices such as MOSFETs in a common chip. A deep trench isolates the devices. Contacts are connected to the source drain and gate electrode (or other electrodes) and are interconnected as required for a circuit function either within the chip or on the support board. Ball contacts are connected to the electrodes. The opposite surface of the chip to that in which the devices are formed receives a copper or other metal layer which is patterned to increase its area for heat exchange. The surface of the copper is coated with black oxide to increase its ability to radiate heat.

Abstract translation: 倒装芯片结构包含横向​​间隔的半导体器件，例如公共芯片中的MOSFET。 深沟渠隔离设备。 触点连接到源极漏极和栅电极（或其他电极），并且根据芯片或支撑板上的电路功能的要求进行互连。 球触点连接到电极。 芯片的与形成器件的相对表面接收铜或其它金属层，其被图案化以增加其用于热交换的面积。 铜的表面涂覆有黑色氧化物以增加其辐射热能力。

公开(公告)号：US07274100B2

公开(公告)日：2007-09-25

申请号：US10875473

申请日：2004-06-23

Applicant: Mark Pavier ,  Tim Sammon

Inventor： Mark Pavier ,  Tim Sammon

IPC: H01L23/34

CPC classification number: H01L23/5383 ,  H01L25/16 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/13091 ,  H01L2924/19105 ,  H05K1/0373 ,  H05K1/095 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K3/4644 ,  H05K3/4688 ,  H05K2201/0209 ,  H05K2201/0215 ,  H05K2201/083 ,  H05K2201/09672 ,  Y10S257/924 ,  H01L2224/0401

Abstract: An integrated circuit which includes a circuit board having passive elements embedded in its body.

Abstract translation: 一种集成电路，其包括具有嵌入其主体中的无源元件的电路板。

公开(公告)号：US06717260B2

公开(公告)日：2004-04-06

申请号：US10045809

申请日：2002-01-11

Applicant: Mark Pavier ,  Tim Sammon ,  Rachel Anderson

Inventor： Mark Pavier ,  Tim Sammon ,  Rachel Anderson

IPC: H01L2334

CPC classification number: H01L23/49562 ,  H01L23/49551 ,  H01L24/48 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/48247 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/13091 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor package includes a lead frame having a displaced integral strap which is cupped out of a lead frame plane to provide a nest that receives a semiconductor chip electrically connected to an inner surface of the cupped strap. The semiconductor package further has a housing molded over and encapsulating the semiconductor chip with the frame such that a surface of the semiconductor chip facing away from the cupped strip is flush with or protrudes beyond a bottom of the housing.

公开(公告)号：US07678680B2

公开(公告)日：2010-03-16

申请号：US11144483

申请日：2005-06-02

Applicant: Sven Fuchs ,  Mark Pavier

Inventor： Sven Fuchs ,  Mark Pavier

IPC: H01L21/44

CPC classification number: H01L23/10 ,  H01L23/041 ,  H01L24/02 ,  H01L24/11 ,  H01L2224/0401 ,  H01L2224/13099 ,  H01L2224/32245 ,  H01L2224/73153 ,  H01L2224/73253 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01088 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/13033 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/16152 ,  H01L2924/00

Abstract: A semiconductor device that includes an electrode of one material and a conductive material of lower resistivity formed over the electrode and a process for fabricating the semiconductor device.

Abstract translation: 一种半导体器件，其包括在电极上形成的一种材料的电极和具有较低电阻率的导电材料，以及制造该半导体器件的工艺。