SOLAR CELL MODULE AND METHOD FOR MANUFACTURING THE SAME

    公开(公告)号:US20180013024A1

    公开(公告)日:2018-01-11

    申请号:US15539430

    申请日:2015-12-17

    Abstract: A solar cell module capable of preventing the occurrence of a PID failure in a solar photovoltaic power generation system with a MW capacity, said system being used in a high-temperature high-humidity environment; and a method for manufacturing this solar cell module. A solar cell module which comprises a protection glass material and a sealing material on a light receiving surface side of a substrate, and which also comprises an oxide layer between the substrate and the protection glass material, said oxide layer containing a metal element and silicon. It is preferable that the oxide layer contains at least one metal element selected from the group consisting of magnesium, aluminum, titanium, vanadium, chromium, manganese, zirconium, niobium and molybdenum. It is also preferable that the oxide layer has a refractive index of from 1.5 to 2.3 (inclusive) with respect to incident light having a wavelength of 587 nm.

    SOLAR CELL DEVICE AND METHOD FOR MANUFACTURING SAME

    公开(公告)号:US20180097128A1

    公开(公告)日:2018-04-05

    申请号:US15559258

    申请日:2016-03-07

    CPC classification number: H01L31/022425 H01L31/0512 H01L31/068 Y02E10/547

    Abstract: Provided is a solar cell device wherein: a Cu-containing metal layer exhibits good adhesion strength with respect to an Si substrate and a tab wire; and diffusion of Cu into the substrate and an Ag finger wiring line is suppressed. Provided is a solar cell device which comprises a silicon semiconductor substrate, a Cu-containing metal layer, an Ag-containing finger wiring line, and an interface layer containing an oxide or an organic compound. The Ag-containing finger wiring line is formed on the light receiving surface of the silicon semiconductor substrate; the interface layer is formed on the light receiving surface of the silicon semiconductor substrate; and the Cu-containing metal layer is formed on the interface layer and is arranged at a distance from the Ag-containing finger wiring line.

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