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Patent Agency Ranking
公开(公告)号：US20160020799A1
公开(公告)日：2016-01-21
申请号：US14867795
申请日：2015-09-28
Applicant: MaxLinear, Inc.
Inventor： Kishore Seendripu , Raymond Montemayor , Sheng Ye , Glenn Chang , Curtis Ling
CPC classification number: H04B1/26 , H03D3/007 , H03D3/008 , H03D3/009 , H03D7/14 , H03D7/1441 , H03D7/1458 , H03D7/1475 , H03D7/165 , H03D7/166 , H03D2200/0086 , H03H11/22 , H04B1/10 , H04B1/109 , H04B1/12 , H04B1/30 , H04B15/00 , H04J1/18 , H04L27/34
Abstract: Receiver architectures and methods of processing harmonic rich input signals employing harmonic suppression mixers are disclosed herein. The disclosed receivers, mixers, and methods enable a receiver to achieve the advantages of switching mixers while greatly reducing the mixer response to the undesired harmonics. A harmonic mixer can include a plurality of mixers coupled to an input signal. A plurality of phases of a local oscillator signal can be generated from a single local oscillator output. Each of the phases can be used to drive an input of one of the mixers. The mixer outputs can be combined to generate a frequency converted output that has harmonic rejection.
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公开(公告)号：US20150318825A1
公开(公告)日：2015-11-05
申请号：US14797207
申请日：2015-07-13
Applicant: MaxLinear, Inc.
Inventor： Kishore Seendripu , Raymond Montemayor , Sheng Ye , Glenn Chang , Curtis Ling
CPC classification number: H04B1/26 , H03D3/007 , H03D3/008 , H03D3/009 , H03D7/14 , H03D7/1441 , H03D7/1458 , H03D7/1475 , H03D7/165 , H03D7/166 , H03D2200/0086 , H03H11/22 , H04B1/10 , H04B1/109 , H04B1/12 , H04B1/30 , H04B15/00 , H04J1/18 , H04L27/34
Abstract: Receiver architectures and methods of processing harmonic rich input signals employing harmonic suppression mixers are disclosed herein. The disclosed receivers, mixers, and methods enable a receiver to achieve the advantages of switching mixers while greatly reducing the mixer response to the undesired harmonics. A harmonic mixer can include a plurality of mixers coupled to an input signal. A plurality of phases of a local oscillator signal can be generated from a single local oscillator output. Each of the phases can be used to drive an input of one of the mixers. The mixer outputs can be combined to generate a frequency converted output that has harmonic rejection.
Abstract translation: 本文公开了采用谐波抑制混频器处理谐波丰富输入信号的接收机架构和方法。 所公开的接收机，混频器和方法使得接收机能够实现切换混频器的优点，同时大大降低了混频器对不需要的谐波的响应。 谐波混频器可以包括耦合到输入信号的多个混频器。 可以从单个本地振荡器输出产生本地振荡器信号的多个相位。 每个相都可用于驱动混合器之一的输入。 混频器输出可以组合以产生具有谐波抑制的频率转换输出。
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公开(公告)号：US20160261298A1
公开(公告)日：2016-09-08
申请号：US15155102
申请日：2016-05-16
Applicant: MaxLinear, Inc.
Inventor： Kishore Seendripu , Raymond Montemayor , Sheng Ye , Glenn Chang , Curtis Ling
IPC: H04B1/26
CPC classification number: H04B1/26 , H03D3/007 , H03D3/008 , H03D3/009 , H03D7/14 , H03D7/1441 , H03D7/1458 , H03D7/1475 , H03D7/165 , H03D7/166 , H03D2200/0086 , H03H11/22 , H04B1/10 , H04B1/109 , H04B1/12 , H04B1/30 , H04B15/00 , H04J1/18 , H04L27/34
Abstract: Receiver architectures and methods of processing harmonic rich input signals employing harmonic suppression mixers are disclosed herein. The disclosed receivers, mixers, and methods enable a receiver to achieve the advantages of switching mixers while greatly reducing the mixer response to the undesired harmonics. A harmonic mixer can include a plurality of mixers coupled to an input signal. A plurality of phases of a local oscillator signal can be generated from a single local oscillator output. Each of the phases can be used to drive an input of one of the mixers. The mixer outputs can be combined to generate a frequency converted output that has harmonic rejection.
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公开(公告)号：US20160182160A1
公开(公告)日：2016-06-23
申请号：US15056229
申请日：2016-02-29
Applicant: MaxLinear, Inc.
Inventor： Kishore Seendripu , Raymond Montemayor , Sheng Ye , Glenn Chang , Curtis Ling
CPC classification number: H04B1/26 , H03D3/007 , H03D3/008 , H03D3/009 , H03D7/14 , H03D7/1441 , H03D7/1458 , H03D7/1475 , H03D7/165 , H03D7/166 , H03D2200/0086 , H03H11/22 , H04B1/10 , H04B1/109 , H04B1/12 , H04B1/30 , H04B15/00 , H04J1/18 , H04L27/34
Abstract: Receiver architectures and methods of processing harmonic rich input signals employing harmonic suppression mixers are disclosed herein. The disclosed receivers, mixers, and methods enable a receiver to achieve the advantages of switching mixers while greatly reducing the mixer response to the undesired harmonics. A harmonic mixer can include a plurality of mixers coupled to an input signal. A plurality of phases of a local oscillator signal can be generated from a single local oscillator output. Each of the phases can be used to drive an input of one of the mixers. The mixer outputs can be combined to generate a frequency converted output that has harmonic rejection.
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公开(公告)号：US20160099737A1
公开(公告)日：2016-04-07
申请号：US14966660
申请日：2015-12-11
Applicant: MaxLinear, Inc.
Inventor： Kishore Seendripu , Raymond Montemayor , Sheng Ye , Glenn Chang , Curtis Ling
CPC classification number: H04B1/26 , H03D3/007 , H03D3/008 , H03D3/009 , H03D7/14 , H03D7/1441 , H03D7/1458 , H03D7/1475 , H03D7/165 , H03D7/166 , H03D2200/0086 , H03H11/22 , H04B1/10 , H04B1/109 , H04B1/12 , H04B1/30 , H04B15/00 , H04J1/18 , H04L27/34
Abstract: Receiver architectures and methods of processing harmonic rich input signals employing harmonic suppression mixers are disclosed herein. The disclosed receivers, mixers, and methods enable a receiver to achieve the advantages of switching mixers while greatly reducing the mixer response to the undesired harmonics. A harmonic mixer can include a plurality of mixers coupled to an input signal. A plurality of phases of a local oscillator signal can be generated from a single local oscillator output. Each of the phases can be used to drive an input of one of the mixers. The mixer outputs can be combined to generate a frequency converted output that has harmonic rejection.
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