公开(公告)号：US10983852B2

公开(公告)日：2021-04-20

申请号：US16262111

申请日：2019-01-30

Applicant: Micron Technology, Inc.

Inventor： Michael R. Spica ,  Patrick T. Caraher

IPC: G06F11/00 ,  G06F11/07 ,  G06F11/30

Abstract: A memory sub-system comprises a power management component comprising a plurality of regulators configured to supply respective operating voltages for components of the memory sub-system. The power management component is configured to adjust a regulator voltage level provided to a particular component until an operation state change of the particular component is detected. The power management voltage level is further configured to determine a value of the regulator voltage level at which the operation state change of the particular component is detected.

公开(公告)号：US20230025355A1

公开(公告)日：2023-01-26

申请号：US17961999

申请日：2022-10-07

Applicant: Micron Technology, Inc.

Inventor： Michael R. Spica ,  Patrick T. Caraher

IPC: G06F11/07 ,  G06F11/30

Abstract: A memory sub-system comprises a power management component comprising a plurality of regulators configured to supply respective operating voltages for components of the memory sub-system. The power management component is configured to adjust a regulator voltage level provided to a particular component until an operation state change of the particular component is detected. The power management voltage level is further configured to determine a value of the regulator voltage level at which the operation state change of the particular component is detected.

公开(公告)号：US11474888B2

公开(公告)日：2022-10-18

申请号：US17221065

申请日：2021-04-02

Applicant: Micron Technology, Inc.

Inventor： Michael R. Spica ,  Patrick T. Caraher

IPC: G06F11/00 ,  G06F11/07 ,  G06F11/30

Abstract: A memory sub-system comprises a power management component comprising a plurality of regulators configured to supply respective operating voltages for components of the memory sub-system. The power management component is configured to adjust a regulator voltage level provided to a particular component until an operation state change of the particular component is detected. The power management voltage level is further configured to determine a value of the regulator voltage level at which the operation state change of the particular component is detected.

公开(公告)号：US20210224147A1

公开(公告)日：2021-07-22

申请号：US17221065

申请日：2021-04-02

Applicant: Micron Technology, Inc.

Inventor： Michael R. Spica ,  Patrick T. Caraher

IPC: G06F11/07 ,  G06F11/30

Abstract: A memory sub-system comprises a power management component comprising a plurality of regulators configured to supply respective operating voltages for components of the memory sub-system. The power management component is configured to adjust a regulator voltage level provided to a particular component until an operation state change of the particular component is detected. The power management voltage level is further configured to determine a value of the regulator voltage level at which the operation state change of the particular component is detected.

公开(公告)号：US11960349B2

公开(公告)日：2024-04-16

申请号：US17961999

申请日：2022-10-07

Applicant: Micron Technology, Inc.

Inventor： Michael R. Spica ,  Patrick T. Caraher

IPC: G06F11/00 ,  G06F11/07 ,  G06F11/30

CPC classification number: G06F11/0727 ,  G06F11/0751 ,  G06F11/3037 ,  G06F11/3058

Abstract: A memory sub-system comprises a power management component comprising a plurality of regulators configured to supply respective operating voltages for components of the memory sub-system. The power management component is configured to adjust a regulator voltage level provided to a particular component until an operation state change of the particular component is detected. The power management voltage level is further configured to determine a value of the regulator voltage level at which the operation state change of the particular component is detected.

公开(公告)号：US20200243119A1

公开(公告)日：2020-07-30

申请号：US16262111

申请日：2019-01-30

Applicant: Micron Technology, Inc.

Inventor： Michael R. Spica ,  Patrick T. Caraher

IPC: G11C5/14 ,  G06F11/07 ,  G01R19/165

Abstract: A memory sub-system comprises a power management component comprising a plurality of regulators configured to supply respective operating voltages for components of the memory sub-system. The power management component is configured to adjust a regulator voltage level provided to a particular component until an operation state change of the particular component is detected. The power management voltage level is further configured to determine a value of the regulator voltage level at which the operation state change of the particular component is detected.