POWER MANAGEMENT COMPONENT FOR MEMORY SUB-SYSTEM VOLTAGE REGULATION

    公开(公告)号:US20230025355A1

    公开(公告)日:2023-01-26

    申请号:US17961999

    申请日:2022-10-07

    Abstract: A memory sub-system comprises a power management component comprising a plurality of regulators configured to supply respective operating voltages for components of the memory sub-system. The power management component is configured to adjust a regulator voltage level provided to a particular component until an operation state change of the particular component is detected. The power management voltage level is further configured to determine a value of the regulator voltage level at which the operation state change of the particular component is detected.

    USING A THERMOELECTRIC COMPONENT TO IMPROVE MEMORY SUB-SYSTEM PERFORMANCE

    公开(公告)号:US20220382348A1

    公开(公告)日:2022-12-01

    申请号:US17884481

    申请日:2022-08-09

    Inventor: Michael R. Spica

    Abstract: A system receives event information associated with an event that corresponds to a temperature of a memory sub-system including memory devices encased in respective packages. The system determines whether the event information associated with the event satisfies a threshold condition. Responsive to determining that the event information associated with the event satisfies the threshold condition, the system causes a thermoelectric component (TEC) that is coupled to an external surface of each of the respective packages of the memory devices of the memory sub-system to transfer thermal energy between the TEC and the memory devices via thermal conduction.

    Power management component for memory sub-system voltage regulation

    公开(公告)号:US10983852B2

    公开(公告)日:2021-04-20

    申请号:US16262111

    申请日:2019-01-30

    Abstract: A memory sub-system comprises a power management component comprising a plurality of regulators configured to supply respective operating voltages for components of the memory sub-system. The power management component is configured to adjust a regulator voltage level provided to a particular component until an operation state change of the particular component is detected. The power management voltage level is further configured to determine a value of the regulator voltage level at which the operation state change of the particular component is detected.

    Intelligent memory device test rack

    公开(公告)号:US12142336B2

    公开(公告)日:2024-11-12

    申请号:US17716972

    申请日:2022-04-08

    Abstract: A detection is made by a processing device allocated to a memory device test board of a distributed test platform that a memory sub-system has engaged with a memory device test resource of the memory device test board. A test is identified to be performed for a memory device of the memory sub-system. The test includes first instructions to be executed by a memory sub-system controller of the memory sub-system in performance of the test and second instructions to be executed by the processing device in performance of the test. The second instructions are to cause one or more test condition components of the memory device test resource to generate one or more test conditions to be applied to the memory device while the memory sub-system executes the first instructions. Responsive to a transmission of the first instructions to the memory sub-system controller, the second instructions are executed.

    Power management component for memory sub-system voltage regulation

    公开(公告)号:US11474888B2

    公开(公告)日:2022-10-18

    申请号:US17221065

    申请日:2021-04-02

    Abstract: A memory sub-system comprises a power management component comprising a plurality of regulators configured to supply respective operating voltages for components of the memory sub-system. The power management component is configured to adjust a regulator voltage level provided to a particular component until an operation state change of the particular component is detected. The power management voltage level is further configured to determine a value of the regulator voltage level at which the operation state change of the particular component is detected.

    Using a thermoelectric component to improve memory sub-system performance

    公开(公告)号:US11416048B2

    公开(公告)日:2022-08-16

    申请号:US16518267

    申请日:2019-07-22

    Inventor: Michael R. Spica

    Abstract: First event information that is associated with an event that corresponds to a temperature of a memory sub-system is received. Whether the first event information associated with the event that corresponds to the temperature of the memory sub-system satisfies a first threshold condition is determined. Responsive to determining that the first event information associated with the event that corresponds to the temperature of the memory sub-system satisfies the first threshold condition, a thermoelectric component (TEC) is caused to change from an inactive state to an active state by decreasing a temperature at a bottom surface of the TEC that is coupled to the memory sub-system as a temperature at a top surface of the TEC increases.

    POWER MANAGEMENT COMPONENT FOR MEMORY SUB-SYSTEM VOLTAGE REGULATION

    公开(公告)号:US20210224147A1

    公开(公告)日:2021-07-22

    申请号:US17221065

    申请日:2021-04-02

    Abstract: A memory sub-system comprises a power management component comprising a plurality of regulators configured to supply respective operating voltages for components of the memory sub-system. The power management component is configured to adjust a regulator voltage level provided to a particular component until an operation state change of the particular component is detected. The power management voltage level is further configured to determine a value of the regulator voltage level at which the operation state change of the particular component is detected.

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