公开(公告)号：US09245828B2

公开(公告)日：2016-01-26

申请号：US13940121

申请日：2013-07-11

Applicant: Mindspeed Technologies, Inc.

Inventor： Atul K. Gupta ,  Ryan S. Latchman ,  Marek S. Tlalka

IPC: H01L23/488 ,  H01L23/00 ,  H01L25/065 ,  H05K1/02 ,  H05K1/11 ,  H05K1/14

CPC classification number: H01L23/488 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/48227 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/15747 ,  H05K1/0209 ,  H05K1/111 ,  H05K1/141 ,  H05K2201/041 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A package and integrated circuit assembly is configured to perform signal conditioning on a signal. The assembly includes a line card having line card contacts that correspond to conductors in the line card connector. Two or more integrated circuits are configured to perform signal conditioning on the signal and the two or more integrated circuits are configured within a package into at least a first row and a second row on the package. The package includes a grid array of bonding pads to electrically connect to the two or more integrated circuits through bond wires or down bonds such that the structure of the grid array corresponds in physical arrangement or bond pad pitch to the line card contacts. This assembly also includes an electrical connection from the two or more integrated circuits to the line card through the package.

Abstract translation: 封装和集成电路组件被配置为对信号执行信号调节。 组件包括具有对应于线卡连接器中的导体的线卡触点的线卡。 两个或多个集成电路被配置为对信号执行信号调节，并且两个或更多个集成电路在封装内配置成封装中的至少第一行和第二行。 封装包括焊盘的栅格阵列，以通过接合线或向下接合电连接到两个或多个集成电路，使得栅格阵列的结构在物理布置或接合焊盘间距对应于线卡接触。 该组件还包括通过封装从两个或多个集成电路到线卡的电连接。

公开(公告)号：US20140021597A1

公开(公告)日：2014-01-23

申请号：US13940121

申请日：2013-07-11

Applicant: Mindspeed Technologies, Inc.

Inventor： Atul K. Gupta ,  Ryan S. Latchman ,  Marek S. Tlalka

IPC: H01L23/488

CPC classification number: H01L23/488 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/48227 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/15747 ,  H05K1/0209 ,  H05K1/111 ,  H05K1/141 ,  H05K2201/041 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A package and integrated circuit assembly is configured to perform signal conditioning on a signal. The assembly includes a line card having line card contacts that correspond to conductors in the line card connector. Two or more integrated circuits are configured to perform signal conditioning on the signal and the two or more integrated circuits are configured within a package into at least a first row and a second row on the package. The package includes a grid array of bonding pads to electrically connect to the two or more integrated circuits through bond wires or down bonds such that the structure of the grid array corresponds in physical arrangement or bond pad pitch to the line card contacts. This assembly also includes an electrical connection from the two or more integrated circuits to the line card through the package.

Abstract translation: 封装和集成电路组件被配置为对信号执行信号调节。 组件包括具有对应于线卡连接器中的导体的线卡触点的线卡。 两个或多个集成电路被配置为对信号执行信号调节，并且两个或更多个集成电路在封装内配置成封装中的至少第一行和第二行。 封装包括焊盘的栅格阵列，以通过接合线或向下接合电连接到两个或多个集成电路，使得栅格阵列的结构在物理布置或接合焊盘间距对应于线卡接触。 该组件还包括通过封装从两个或多个集成电路到线卡的电连接。

公开(公告)号：US09450788B1

公开(公告)日：2016-09-20

申请号：US14706403

申请日：2015-05-07

Applicant: Mindspeed Technologies, Inc.

Inventor： Wim F. Cops ,  Atul K. Gupta

IPC: H04L25/03

CPC classification number: H04L25/03057 ,  H04L25/03019 ,  H04L25/03159

Abstract: A system and method for calculating optimal equalizer coefficients during an initialization phase is disclosed. An equalizer system for processing a received signal at a communications receiver comprises several equalizers and adaptation modules. A first equalizer is configured to receive and process a received signal to create a first equalizer output. The first equalizer is active during an initialization phase and active during an operational phase. A second equalizer is configured to receive and process the first equalizer output to create a second equalizer output. The second equalizer is active during an initialization phase and aids in the generation of the first equalizer coefficients, and inactive during an operation phase. A third equalizer is configured to receive and process the first equalizer output to create a third equalizer output such that the third equalizer is inactive during an initialization phase and active during an operation phase.

Abstract translation: 公开了一种在初始化阶段计算最优均衡器系数的系统和方法。 用于在通信接收机处理接收信号的均衡器系统包括若干均衡器和适配模块。 第一均衡器被配置为接收和处理接收的信号以创建第一均衡器输出。 第一个均衡器在初始化阶段处于活动状态，并在运行阶段处于活动状态。 第二均衡器被配置为接收和处理第一均衡器输出以创建第二均衡器输出。 第二均衡器在初始化期间是有效的，并且有助于产生第一均衡器系数，并且在操作阶段期间不起作用。 第三均衡器被配置为接收和处理第一均衡器输出以创建第三均衡器输出，使得第三均衡器在初始化阶段期间不活动并且在操作阶段期间处于活动状态。