Abstract:
An electronic apparatus comprising a unified non-volatile memory and a control unit is disclosed. The unified non-volatile memory comprises a first memory section, served as a read only memory; and a second memory section, served as a random access memory. The control unit controls the unified non-volatile memory. The first memory section further comprises: a first area for the first memory section; and a second area for the first memory section. The control unit adjusts a refresh rate of the second memory section according to an amount of access times of the second memory section.
Abstract:
An electronic apparatus comprising a unified non-volatile memory and a control unit is disclosed. The unified non-volatile memory comprises a first memory section, served as a read only memory; and a second memory section, served as a random access memory. The control unit controls the unified non-volatile memory. The first memory section further comprises: a first area for the first memory section; and a second area for the first memory section. The control unit adjusts a refresh rate of the second memory section according to a number of access times of the second memory section.
Abstract:
Discloses is a unified non-volatile memory comprising: a first memory section, served as a read only memory; and a second memory section, served as a random access memory. An electronic apparatus applying the unified non-volatile memory is also disclosed.