公开(公告)号：US20220140741A1

公开(公告)日：2022-05-05

申请号：US17308188

申请日：2021-05-05

Applicant: National Taiwan University of Science and Technology

Inventor： JING-YUAN LIN ,  PIN-HSIEN LIU ,  Ju-Hsin Chen ,  HSUAN-YU YUEH

IPC: H02M3/335 ,  H02M1/00

Abstract: An LLC resonant converter is provided, which includes an input power source, a full-bridge switch circuit, a resonant circuit, a transformer, a rectifier circuit, a load, and a control circuit. The control circuit includes a load detection circuit and a valley switching circuit. The load detection circuit detects a load state of the load. The valley switching circuit is configured to, in response to the load state being a light load state: correspondingly generate a first difference voltage; calculate a first switch on-time for a first switch and a fourth switch; generate switching signals that control the first switch and the fourth switch to be turned off, and detect voltage valleys of a second switch and a third switch; and generate the switching signals to control the second switch and the third switch to be turned on according to the calculated first switch on-time.

公开(公告)号：US20210126526A1

公开(公告)日：2021-04-29

申请号：US16896326

申请日：2020-06-09

Applicant: National Taiwan University of Science and Technology

Inventor： JING-YUAN LIN ,  RUEI-SHENG TSAI ,  ZHONG-HENG Li ,  PIN-HSIEN LIU ,  HUANG-JEN CHIU

IPC: H02M1/42 ,  H02M1/088 ,  H02M7/5395

Abstract: A totem-pole bridgeless power factor corrector and a power factor correction method are provided. The totem-pole bridgeless power factor corrector obtains a duty cycle of next state by a predictive valley-peak current control method, and uses an OR gate element to combine PWM signals generated by an average current control method and the predictive valley-peak current control method, thereby enabling a digital signal processor to update the duty cycle.

公开(公告)号：US20210159795A1

公开(公告)日：2021-05-27

申请号：US16817735

申请日：2020-03-13

Applicant: National Taiwan University of Science and Technology

Inventor： JING-YUAN LIN ,  JUN-RU WANG ,  PIN-HSIEN LIU ,  HUANG-JEN CHIU

IPC: H02M3/158 ,  H02M1/00

Abstract: A multi-level buck converter includes an input power source, an input capacitor, first to fourth switches, a clamp capacitor, an output inductor, a clamp switch, a clamp diode, an output capacitor, an output load, a current detection circuit, a voltage detection circuit and a control circuit. The current detection circuit detects whether an inductor current of the output inductor exceeds a predetermined current value, and if so, the output clamp signal controls the clamp switch to be turned on. The voltage detection circuit generates a duty cycle control signal according to an error between an output voltage and a target output voltage. The control circuit controls the first to the fourth switches to sequentially enter a first mode, a second mode, a third mode, and a fourth mode in a first part of a duty cycle.