公开(公告)号：US20250130935A1

公开(公告)日：2025-04-24

申请号：US18522148

申请日：2023-11-28

Applicant: PHISON ELECTRONICS CORP.

Inventor： Yuwei Kuo ,  Hung Yuan Tsai ,  Chun Ming Liu ,  Yu Hsuan Chen ,  Yun-You Lin

IPC: G06F12/02

Abstract: A device control method, a memory storage device, and a memory control circuit unit are disclosed. The method includes: establishing a connection between the memory storage device and a host system; performing a first communication with the host system based on the connection and a first connection interface standard; performing a data recovery operation between the memory storage device and the host system via the connection during a period of performing the first communication; and switching to perform a second communication with the host system based on the connection and a second connection interface standard in a case that the data recovery operation is successfully performed, wherein the first connection interface standard is different from the second connection interface standard.

公开(公告)号：US10685735B1

公开(公告)日：2020-06-16

申请号：US16420198

申请日：2019-05-23

Applicant: PHISON ELECTRONICS CORP.

Inventor： Ping-Chuan Lin ,  Shii-Yeu Chern ,  Hsiang-Jui Huang ,  Ping-Yu Hsieh ,  Zih-Jia Wang ,  Yun-You Lin

IPC: G11C29/00 ,  G06F11/18 ,  G06F3/06 ,  G11C16/34

Abstract: The invention provides a memory management method, a memory storage device, and a memory control circuit unit. The method includes: recording an error bit number of each upper physical programming unit and an error bit number of each lower physical programming unit of each of the physical erasing units; determining whether a first physical erasing unit is a bad physical erasing unit according to distributions of the error bit numbers of the upper physical programming units and the lower physical programming units of the first physical erasing unit of the physical erasing units; and performing a data transfer operation on data in the first physical erasing unit if the first physical erasing unit is determined as the bad physical erasing unit.

公开(公告)号：US20250013595A1

公开(公告)日：2025-01-09

申请号：US18450411

申请日：2023-08-16

Applicant: PHISON ELECTRONICS CORP.

Inventor： Yuwei Kuo ,  Yun-You Lin ,  Jhen-Ting Li ,  Christopher Ramseyer

IPC: G06F13/42 ,  G06F13/38

Abstract: A device control method, a memory storage device, and a memory control circuit unit are disclosed. The method includes: obtaining device status information of the memory storage device, and the device status information includes at least one of temperature information and power consumption information; and adjusting a connection interface standard adopted by a connection interface unit of the memory storage device from a first connection interface standard to a second connection interface standard according to the device status information, and the first connection interface standard is different from the second connection interface standard.

公开(公告)号：US20230021668A1

公开(公告)日：2023-01-26

申请号：US17396770

申请日：2021-08-09

Applicant: PHISON ELECTRONICS CORP.

Inventor： Yu-Hung Yeh ,  Yun-You Lin

IPC: G11C7/04 ,  G11C16/34 ,  G06F1/20 ,  G06F1/3234 ,  G06F9/50

Abstract: A temperature control method, a memory storage apparatus, and a memory control circuit unit are disclosed. The method includes: detecting a system parameter of the memory storage apparatus, and the system parameter reflects wear of a rewritable non-volatile memory module in the memory storage apparatus; determining a temperature control threshold value according to the system parameter; and performing a temperature reducing operation in response to a temperature of the memory storage apparatus reaching the temperature control threshold value to reduce the temperature of the memory storage apparatus.