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公开(公告)号：US09813048B2
公开(公告)日：2017-11-07
申请号：US15334649
申请日：2016-10-26
Applicant: Purdue Research Foundation
Inventor： Kaushik Roy , Mrigank Sharad
IPC: H03K3/356 , G06N3/063 , G11C11/16 , G11C11/54 , G11C13/00 , G11C15/02 , G11C15/04 , H03M1/46 , H03M1/38
CPC classification number: H03K3/356104 , G06N3/063 , G11C11/16 , G11C11/161 , G11C11/1673 , G11C11/1675 , G11C11/1693 , G11C11/54 , G11C13/0007 , G11C13/0069 , G11C15/02 , G11C15/046 , H03M1/38 , H03M1/46
Abstract: An electronic comparison system includes input stages that successively provide bits of code words. One-shots connected to respective stages successively provide a first bit value until receiving a bit having a non-preferred value concurrently with an enable signal, and then provide a second, different bit value. An enable circuit provides the enable signal if at least one of the one-shots is providing the first bit value. A neural network system includes a crossbar with row and column electrodes and resistive memory elements at their intersections. A writing circuit stores weights in the elements. A signal source applies signals to the row electrodes. Comparators compare signals on the column electrodes to corresponding references using domain-wall neurons and store bit values in CMOS latches by comparison with a threshold.
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Patent Agency Ranking
公开(公告)号：US10476487B2
公开(公告)日：2019-11-12
申请号：US15801535
申请日：2017-11-02
Applicant: Purdue Research Foundation
Inventor： Kaushik Roy , Mrigank Sharad
IPC: H03K3/356 , G11C11/16 , G11C11/54 , G11C13/00 , G11C15/02 , G11C15/04 , G06N3/063 , H03M1/46 , H03M1/38
Abstract: An electronic comparison system includes input stages that successively provide bits of code words. One-shots connected to respective stages successively provide a first bit value until receiving a bit having a non-preferred value concurrently with an enable signal, and then provide a second, different bit value. An enable circuit provides the enable signal if at least one of the one-shots is providing the first bit value. A neural network system includes a crossbar with row and column electrodes and resistive memory elements at their intersections. A writing circuit stores weights in the elements. A signal source applies signals to the row electrodes. Comparators compare signals on the column electrodes to corresponding references using domain-wall neurons and store bit values in CMOS latches by comparison with a threshold.
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公开(公告)号：US20170047913A1
公开(公告)日：2017-02-16
申请号：US15334649
申请日：2016-10-26
Applicant: Purdue Research Foundation
Inventor： Kaushik Roy , Mrigank Sharad
CPC classification number: H03K3/356104 , G06N3/063 , G11C11/16 , G11C11/161 , G11C11/1673 , G11C11/1675 , G11C11/1693 , G11C11/54 , G11C13/0007 , G11C13/0069 , G11C15/02 , G11C15/046 , H03M1/38 , H03M1/46
Abstract: An electronic comparison system includes input stages that successively provide bits of code words. One-shots connected to respective stages successively provide a first bit value until receiving a bit having a non-preferred value concurrently with an enable signal, and then provide a second, different bit value. An enable circuit provides the enable signal if at least one of the one-shots is providing the first bit value. A neural network system includes a crossbar with row and column electrodes and resistive memory elements at their intersections. A writing circuit stores weights in the elements. A signal source applies signals to the row electrodes. Comparators compare signals on the column electrodes to corresponding references using domain-wall neurons and store bit values in CMOS latches by comparison with a threshold.
Abstract translation: 电子比较系统包括连续提供码字位的输入级。 连接到各个级的单次拍摄连续地提供第一比特值，直到与使能信号同时接收到具有非优选值的比特，然后提供第二不同的比特值。 如果单次拍摄中的至少一个提供第一比特值，则使能电路提供使能信号。 神经网络系统包括在其交点处具有行和列电极以及电阻存储器元件的交叉开关。 写入电路在元素中存储权重。 信号源将信号施加到行电极。 比较器使用畴壁神经元将列电极上的信号与相应的参考值进行比较，并通过与阈值进行比较将位锁定值存储在CMOS锁存器中。
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公开(公告)号：US09489618B2
公开(公告)日：2016-11-08
申请号：US14287701
申请日：2014-05-27
Applicant: Purdue Research Foundation
Inventor： Kaushik Roy , Mrigank Sharad
CPC classification number: H03K3/356104 , G06N3/063 , G11C11/16 , G11C11/161 , G11C11/1673 , G11C11/1675 , G11C11/1693 , G11C11/54 , G11C13/0007 , G11C13/0069 , G11C15/02 , G11C15/046 , H03M1/38 , H03M1/46
Abstract: An electronic comparison system includes input stages that successively provide bits of code words. One-shots connected to respective stages successively provide a first bit value until receiving a bit having a non-preferred value concurrently with an enable signal, and then provide a second, different bit value. An enable circuit provides the enable signal if at least one of the one-shots is providing the first bit value. A neural network system includes a crossbar with row and column electrodes and resistive memory elements at their intersections. A writing circuit stores weights in the elements. A signal source applies signals to the row electrodes. Comparators compare signals on the column electrodes to corresponding references using domain-wall neurons and store bit values in CMOS latches by comparison with a threshold.
Abstract translation: 电子比较系统包括连续提供码字位的输入级。 连接到各个级的单次拍摄连续地提供第一比特值，直到与使能信号同时接收到具有非优选值的比特，然后提供第二不同的比特值。 如果单次拍摄中的至少一个提供第一比特值，则使能电路提供使能信号。 神经网络系统包括在其交点处具有行和列电极以及电阻存储器元件的交叉开关。 写入电路在元素中存储权重。 信号源将信号施加到行电极。 比较器使用畴壁神经元将列电极上的信号与相应的参考值进行比较，并通过与阈值进行比较将位锁定值存储在CMOS锁存器中。
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公开(公告)号：US20150347896A1
公开(公告)日：2015-12-03
申请号：US14287701
申请日：2014-05-27
Applicant: Purdue Research Foundation
Inventor： Kaushik Roy , Mrigank Sharad
CPC classification number: H03K3/356104 , G06N3/063 , G11C11/16 , G11C11/161 , G11C11/1673 , G11C11/1675 , G11C11/1693 , G11C11/54 , G11C13/0007 , G11C13/0069 , G11C15/02 , G11C15/046 , H03M1/38 , H03M1/46
Abstract: An electronic comparison system includes input stages that successively provide bits of code words. One-shots connected to respective stages successively provide a first bit value until receiving a bit having a non-preferred value concurrently with an enable signal, and then provide a second, different bit value. An enable circuit provides the enable signal if at least one of the one-shots is providing the first bit value. A neural network system includes a crossbar with row and column electrodes and resistive memory elements at their intersections. A writing circuit stores weights in the elements. A signal source applies signals to the row electrodes. Comparators compare signals on the column electrodes to corresponding references using domain-wall neurons and store bit values in CMOS latches by comparison with a threshold.
Abstract translation: 电子比较系统包括连续提供码字位的输入级。 连接到各个级的单次拍摄连续地提供第一比特值，直到与使能信号同时接收到具有非优选值的比特，然后提供第二不同的比特值。 如果单次拍摄中的至少一个提供第一比特值，则使能电路提供使能信号。 神经网络系统包括在其交点处具有行和列电极以及电阻存储器元件的交叉开关。 写入电路在元素中存储权重。 信号源将信号施加到行电极。 比较器使用畴壁神经元将列电极上的信号与相应的参考值进行比较，并通过与阈值进行比较将位锁定值存储在CMOS锁存器中。
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公开(公告)号：US20180069536A1
公开(公告)日：2018-03-08
申请号：US15801535
申请日：2017-11-02
Applicant: Purdue Research Foundation
Inventor： Kaushik Roy , Mrigank Sharad
IPC: H03K3/356 , H03M1/46 , G11C11/54 , G11C15/04 , G11C15/02 , G11C13/00 , G06N3/063 , G11C11/16 , H03M1/38
CPC classification number: H03K3/356104 , G06N3/063 , G11C11/16 , G11C11/161 , G11C11/1673 , G11C11/1675 , G11C11/1693 , G11C11/54 , G11C13/0007 , G11C13/0069 , G11C15/02 , G11C15/046 , H03M1/38 , H03M1/46
Abstract: An electronic comparison system includes input stages that successively provide bits of code words. One-shots connected to respective stages successively provide a first bit value until receiving a bit having a non-preferred value concurrently with an enable signal, and then provide a second, different bit value. An enable circuit provides the enable signal if at least one of the one-shots is providing the first bit value. A neural network system includes a crossbar with row and column electrodes and resistive memory elements at their intersections. A writing circuit stores weights in the elements. A signal source applies signals to the row electrodes. Comparators compare signals on the column electrodes to corresponding references using domain-wall neurons and store bit values in CMOS latches by comparison with a threshold.
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