公开(公告)号：US3916430A

公开(公告)日：1975-10-28

申请号：US34105873

申请日：1973-03-14

Applicant: RCA CORP

Inventor： HEUNER ROBERT CHARLES ,  MORGAN DAVID KEITH ,  STEUDEL GOETZ WOLFGANG

IPC: H01L21/8238 ,  H01L27/02 ,  H01L27/092 ,  H01L29/78 ,  H03K5/02 ,  H03K19/0185 ,  H03K1/00 ,  H03K3/26 ,  H03K3/353

CPC classification number: H01L27/0927 ,  H01L27/0218 ,  H03K5/023 ,  H03K19/018521 ,  Y10S148/038

Abstract: An integrated circuit, formed on a common substrate, having one portion operated from a first source of operating potential and another portion operated from a second source of operating potential. Separate wells are diffused in said substrate for the connection thereto of the different voltages and a reference potential common to the two sources of operating potential is applied to the common substrate. Transistors having a given potential applied to their source electrodes are formed in the common substrate or in a well having the same given potential connected thereto for eliminating potential differences between the source and the substrate of the transistors.

Abstract translation: 形成在公共基板上的集成电路，其具有从第一操作电位操作的一部分和从第二操作电位操作的另一部分。 单独的阱扩散在所述衬底中用于连接到不同电压，并且将两个工作电位源公共的参考电位施加到公共衬底。 具有施加到其源电极的给定电位的晶体管形成在公共衬底或具有与其连接的相同给定电位的阱中，以消除晶体管的源极和衬底之间的电位差。

公开(公告)号：US3578989A

公开(公告)日：1971-05-18

申请号：US3578989D

申请日：1969-06-17

Applicant: RCA CORP

Inventor： HEUNER ROBERT CHARLES

IPC: H03K3/355 ,  H03K3/26

CPC classification number: H03K3/355

Abstract: A monostable multivibrator comprising two cross-coupled inverters having substantially identical threshold voltage levels. Each cross-coupled path includes a charge storage means and there is also included a discharge path for each charge storage means. In response to complementary input signals to the inverters, the multivibrator switches from a first state to a second state and, in response to the first of either charge storage means discharging to the threshold voltage level, the multivibrator switches back to its first state.

公开(公告)号：US3702943A

公开(公告)日：1972-11-14

申请号：US3702943D

申请日：1971-11-05

Applicant: RCA CORP

Inventor： HEUNER ROBERT CHARLES ,  FILLMORE RICHARD PLUMB

IPC: H03K5/02 ,  H03K17/14 ,  H03K19/0948 ,  H03K5/20

CPC classification number: H03K5/023 ,  H03K17/145 ,  H03K19/0948

Abstract: Two field-effect transistors interconnected in such a way that the output voltage produced by the first, which is a function of its voltage threshold, controls the conductivity of the second. One transistor may be reverse biased source-to-substrate to maintain its threshold voltage higher than that of the other. A small change in voltage level may be detected by this circuit by causing that change concurrently to reduce the source-tosubstrate reverse bias of the first transistor and to reverse bias the source-to-substrate of the second transistor.

Abstract translation: 两个场效应晶体管以这样的方式相互连接，使得由其电压阈值的函数的第一个产生的输出电压控制第二个的电导率。 一个晶体管可以是反向偏置的源到衬底，以使其阈值电压比另一个更高。 该电路可以通过同时引起该变化来降低第一晶体管的源到衬底反向偏置并反向偏置第二晶体管的源极到衬底，可以检测电压电平的小的变化。

公开(公告)号：US3628070A

公开(公告)日：1971-12-14

申请号：US3628070D

申请日：1970-04-22

Applicant: RCA CORP

Inventor： HEUNER ROBERT CHARLES ,  NIEMIEC STANLEY JOSEPH

IPC: G01R19/165 ,  G05B1/02 ,  H01L27/092 ,  H03K19/0948 ,  H03K17/60 ,  H03K19/08

CPC classification number: H03K19/0948 ,  G01R19/16519 ,  G05B1/02 ,  H01L27/0927

Abstract: The sum of the threshold voltages of two transistors of different conductivity type is employed as a reference level in voltage sensing and other circuits. A first transistor connected as a diode and its current source are connected in series between a pair of terminals to which a voltage to be sensed is applied. A second transistor of different conductivity type than the first transistor is connected at its control electrode to the connection of the diode to its current source. The conduction path of the second transistor in series with its load is connected at at least one end to one of the pair of terminals.

公开(公告)号：US3591855A

公开(公告)日：1971-07-06

申请号：US3591855D

申请日：1969-04-17

Applicant: RCA CORP

Inventor： DEAN JACK ALLEN ,  HEUNER ROBERT CHARLES

IPC: H03K19/0185 ,  H03K5/08

CPC classification number: H03K19/018521

Abstract: A buffer circuit to interface between a complementary fieldeffect transistor (FET) circuit operated at a first voltage level and a load circuit operated at a second voltage level having a lower value than said first voltage level. The buffer includes an input stage and an output stage. The output stage includes two transistors of opposite conductivity connected in parallel to clamp the buffer output point to the positive terminal of the second power supply and a third transistor to clamp the buffer output point to the negative terminal of the second supply. The input stage includes a complementary inverter operated at the first voltage level which in response to output signals from the FET circuit generates complementary signals used to enable either the parallel combination of the two transistors or the third transistor.