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公开(公告)号：US09645553B1
公开(公告)日：2017-05-09
申请号：US15009019
申请日：2016-01-28
Applicant: Raytheon BBN Technologies Corp.
Inventor： Thomas Gilbert Roden, III , John-Francis Mergen
CPC classification number: G04R20/00 , G04G7/00 , G06F1/14 , H04J3/0635 , H04J3/0638 , H04J3/0688
Abstract: Generally discussed herein are systems, apparatuses, and methods for providing an accurate and stable time base. A device can include a voter to receive a plurality of time source values, determine a central time value, and determine which of the plurality of time source values are valid, a deviance checker to determine a deviance set, a discrete time selector to provide a selector identification identifying which of the time source values is selected, and a network interface to provide a time value based on the selected time source value.
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公开(公告)号：US20190108344A1
公开(公告)日：2019-04-11
申请号：US15728469
申请日：2017-10-09
Applicant: RAYTHEON BBN TECHNOLOGIES CORP.
Abstract: A system and method for detecting Trojans and other intermittent severe defects in a digital circuit design. A simulation of the digital circuit design results in a value change dump file, which is compiled to form a value change summary file containing counts of the numbers of value changes for the signals in the digital circuit design. A discriminative neural network analyzes the value change summary file to determine whether an intermittent severe defect is present. A corpus of digital circuit designs, with and without intermittent severe defects, is used to train the discriminative neural network. The training process may involve dimensionality reduction of the data, enlargement of the data set, and data compression using an autoencoder.
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Patent Agency Ranking
公开(公告)号：US11316553B2
公开(公告)日：2022-04-26
申请号：US16833356
申请日：2020-03-27
Applicant: Raytheon BBN Technologies, Corp.
Inventor： Thomas Gilbert Roden, III , John-Francis Mergen , Christopher Michael Wilder , David Brian Miller, Jr.
IPC: H04B1/7073 , H04L7/033
Abstract: An RF clocked device can include a signal processor operable to receive an RF signal having an RF signal frequency and output a clock signal having a clock frequency based on the RF signal frequency. The RF clocked device can also include a clock operable to receive, and operate, using the clock signal. The clock can output at least one of a time and a date. In addition, a clock system can include an RF clocked device. The RF clocked device can include a signal processor operable to receive an RF signal having an RF signal frequency and output a clock signal having a clock frequency based on the RF signal frequency. The RF clocked device can also include a clock operable to receive, and operate, using the clock signal. The clock can output at least one of a time and a date. The clock system can also include a client device operable to receive timing information from the RF clocked device.
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公开(公告)号：US09208353B2
公开(公告)日：2015-12-08
申请号：US13766401
申请日：2013-02-13
Applicant: Raytheon BBN Technologies Corp.
CPC classification number: G06F21/71 , G06F21/79 , G06F2221/2107
Abstract: Generally described herein are methods and systems for enhanced tamper and malware resistant computer architectures. A system for enhanced tamper and malware resistance can include a harvardizer configured to receive comingled instructions and data and produce separated instructions and data. A data memory can be configured to receive the separated data. An instruction memory that is physically separate from the data memory can be configured to receive the separated instructions. The system can include one or more computer processors that can be configured to execute the separated instructions and data. The system can include one or more encryptors or decryptors to help thwart injection based attacks.
Abstract translation: 这里通常描述了用于增强篡改和防恶意软件的计算机体系结构的方法和系统。 用于增强篡改和恶意软件阻力的系统可以包括被配置为接收附带的指令和数据并产生分离的指令和数据的哈佛器。 可以将数据存储器配置为接收分离的数据。 物理上与数据存储器分离的指令存储器可以被配置为接收分离的指令。 该系统可以包括一个或多个可配置为执行分离的指令和数据的计算机处理器。 该系统可以包括一个或多个加密器或解密器，以帮助阻止基于注射的攻击。
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公开(公告)号：US20210250059A1
公开(公告)日：2021-08-12
申请号：US16833356
申请日：2020-03-27
Applicant: Raytheon BBN Technologies, Corp.
Inventor： Thomas Gilbert Roden, III , John-Francis Mergen , Christopher Michael Wilder , David Brian Miller, JR.
IPC: H04B1/7073 , H04L7/033
Abstract: An RF clocked device can include a signal processor operable to receive an RF signal having an RF signal frequency and output a clock signal having a clock frequency based on the RF signal frequency. The RF clocked device can also include a clock operable to receive, and operate, using the clock signal. The clock can output at least one of a time and a date. In addition, a clock system can include an RF clocked device. The RF clocked device can include a signal processor operable to receive an RF signal having an RF signal frequency and output a clock signal having a clock frequency based on the RF signal frequency. The RF clocked device can also include a clock operable to receive, and operate, using the clock signal. The clock can output at least one of a time and a date. The clock system can also include a client device operable to receive timing information from the RF clocked device.
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公开(公告)号：US10853493B2
公开(公告)日：2020-12-01
申请号：US15728469
申请日：2017-10-09
Applicant: RAYTHEON BBN TECHNOLOGIES CORP.
Abstract: A system and method for detecting Trojans and other intermittent severe defects in a digital circuit design. A simulation of the digital circuit design results in a value change dump file, which is compiled to form a value change summary file containing counts of the numbers of value changes for the signals in the digital circuit design. A discriminative neural network analyzes the value change summary file to determine whether an intermittent severe defect is present. A corpus of digital circuit designs, with and without intermittent severe defects, is used to train the discriminative neural network. The training process may involve dimensionality reduction of the data, enlargement of the data set, and data compression using an autoencoder.
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公开(公告)号：US20140229743A1
公开(公告)日：2014-08-14
申请号：US13766401
申请日：2013-02-13
Applicant: RAYTHEON BBN TECHNOLOGIES CORP.
IPC: G06F21/60
CPC classification number: G06F21/71 , G06F21/79 , G06F2221/2107
Abstract: Generally described herein are methods and systems for enhanced tamper and malware resistant computer architectures. A system for enhanced tamper and malware resistance can include a harvardizer configured to receive comingled instructions and data and produce separated instructions and data. A data memory can be configured to receive the separated data. An instruction memory that is physically separate from the data memory can be configured to receive the separated instructions. The system can include one or more computer processors that can be configured to execute the separated instructions and data. The system can include one or more encryptors or decryptors to help thwart injection based attacks.
Abstract translation: 这里通常描述了用于增强篡改和防恶意软件的计算机体系结构的方法和系统。 用于增强篡改和恶意软件阻力的系统可以包括被配置为接收附带的指令和数据并产生分离的指令和数据的哈佛器。 可以将数据存储器配置为接收分离的数据。 物理上与数据存储器分离的指令存储器可以被配置为接收分离的指令。 该系统可以包括一个或多个可配置为执行分离的指令和数据的计算机处理器。 该系统可以包括一个或多个加密器或解密器，以帮助阻止基于注射的攻击。
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