公开(公告)号：US20240295591A1

公开(公告)日：2024-09-05

申请号：US18592899

申请日：2024-03-01

Applicant: Renesas Electronics America Inc.

Inventor： Yashovardhan Rao POTLAPALLI ,  John Stuart KLEINE

IPC: G01R19/25 ,  H03M1/00

CPC classification number: G01R19/2506 ,  G01R19/2513 ,  H03M1/001

Abstract: Systems and methods for power converters are described. A digital to analog converter (DAC) can be configured to receive a digital representation of a maximum current value of a power conversion system. The DAC can be further configured to convert the digital representation of the maximum current value into an analog current signal. An analog to digital converter (ADC) can be configured to generate, based on the analog current signal, a digital signal representing a sensed current of the power conversion system as a function of the maximum current value.

公开(公告)号：US20240297571A1

公开(公告)日：2024-09-05

申请号：US18591469

申请日：2024-02-29

Applicant: Renesas Electronics America Inc.

Inventor： John Stuart KLEINE ,  Yashovardhan Rao POTLAPALLI ,  Michael Jason HOUSTON

IPC: H02M1/084 ,  H02M1/00 ,  H02M3/158

CPC classification number: H02M1/0845 ,  H02M1/0025 ,  H02M3/1586

Abstract: System and methods for a power converter are described. A controller can generate first clock signals and generate pulse width modulation (PWM) signals using the first clock signals to operate a first number of active phases in a power converter to supply power to a load. The controller can determine the load demands a second number, greater than the first number, of active phases to supply the power. The controller can generate pulse signals and combine the pulse signals with the first clock signals to generate second clock signals having a higher frequency than the first clock signals. The controller can generate the PWM signals using the second clock signals to operate the second number of active phases in the power converter to supply power to the load.

公开(公告)号：US20240295892A1

公开(公告)日：2024-09-05

申请号：US18592209

申请日：2024-02-29

Applicant: Renesas Electronics America Inc.

Inventor： John Stuart KLEINE

IPC: G05F1/613 ,  G05F1/46

CPC classification number: G05F1/613 ,  G05F1/462

Abstract: A voltage regulator feedback circuit includes a first comparator, a second comparator and a logic circuit. The first comparator is configured to generate an overshoot signal based on a comparison of a voltage regulation target signal to a feedback voltage signal. The second comparator is configured to generate a forward current signal based on a comparison of the current sense amplifier voltage to a reference voltage. The logic circuit is configured to generate a breaking signal based on the overshoot signal and the forward current signal. A gate signal of a transistor connected between a second end of the inductor and a reference ground is generated based at least in part on the breaking signal and is configured to cause the transistor to open based at least in part on the breaking signal having a true value.