公开(公告)号：US20240297571A1

公开(公告)日：2024-09-05

申请号：US18591469

申请日：2024-02-29

Applicant: Renesas Electronics America Inc.

Inventor： John Stuart KLEINE ,  Yashovardhan Rao POTLAPALLI ,  Michael Jason HOUSTON

IPC: H02M1/084 ,  H02M1/00 ,  H02M3/158

CPC classification number: H02M1/0845 ,  H02M1/0025 ,  H02M3/1586

Abstract: System and methods for a power converter are described. A controller can generate first clock signals and generate pulse width modulation (PWM) signals using the first clock signals to operate a first number of active phases in a power converter to supply power to a load. The controller can determine the load demands a second number, greater than the first number, of active phases to supply the power. The controller can generate pulse signals and combine the pulse signals with the first clock signals to generate second clock signals having a higher frequency than the first clock signals. The controller can generate the PWM signals using the second clock signals to operate the second number of active phases in the power converter to supply power to the load.

公开(公告)号：US20240297564A1

公开(公告)日：2024-09-05

申请号：US18591723

申请日：2024-02-29

Applicant: Renesas Electronics America Inc.

Inventor： Michael Jason HOUSTON ,  Warren Richard SCHROEDER

IPC: H02M1/00 ,  H02M1/088 ,  H02M3/157

CPC classification number: H02M1/0003 ,  H02M1/088 ,  H02M3/157

Abstract: Systems and methods for a voltage converter are described. A controller can include determining a pulse width modulation (PWM) on time duration being used for operating a voltage regulator. The controller can determine a switching frequency being used for operating the voltage regulator. The controller can determine whether the PWM on time duration is greater than or less than an on time reference. The controller can, in response to determining that the PWM on time duration is less than the on time reference, increase a voltage window for a PWM signal being used to operate the voltage regulator. The controller can, in response to determining that the PWM on time duration is greater than the on time reference, perform a frequency locked loop (FLL) to regulate the switching frequency.

公开(公告)号：US20240297565A1

公开(公告)日：2024-09-05

申请号：US18592072

申请日：2024-02-29

Applicant: Renesas Electronics America Inc.

Inventor： Michael Jason HOUSTON ,  Brian Lee ALLEN

IPC: H02M1/00 ,  G06F1/04 ,  H02M1/32

CPC classification number: H02M1/0009 ,  G06F1/04 ,  H02M1/32

Abstract: Systems and methods for a cycle-by-cycle current limit event indicator is described. A circuit can include receiving a plurality of signals indicating occurrences of a plurality of overcurrent events over a plurality of clock cycles in a voltage regulator. The circuit can further include generating a latch signal to indicate the occurrences of the plurality of overcurrent events over the plurality of clock cycles. The latch signal can remain latched at high voltage for a number of clock cycles.

公开(公告)号：US20220399813A1

公开(公告)日：2022-12-15

申请号：US17567018

申请日：2021-12-31

Applicant: Renesas Electronics America Inc.

Inventor： Michael Jason HOUSTON ,  Mehul SHAH ,  Warren SCHROEDER ,  Akshat SHENOY

IPC: H02M3/158 ,  G05F1/575

Abstract: Methods and systems for operating a multiphase voltage regulator are described. The multiphase voltage regulator can include a plurality of power stages. A controller can be connected to the plurality of power stages. The controller can detect a number of activated power stages among the plurality of power stages. The controller can adjust a gain of a current sense feedback loop of the controller to control a load-transient response of the multiphase voltage regulator. The adjustment to the gain can be based on the number of activated power stages.