公开(公告)号：US20190115218A1

公开(公告)日：2019-04-18

申请号：US16230461

申请日：2018-12-21

Applicant: Renesas Electronics America Inc.

Inventor： Patrick M. SHEA

IPC: H01L21/28 ,  H01L29/49 ,  H01L29/78 ,  H01L29/66 ,  H01L29/40

CPC classification number: H01L21/28035 ,  H01L21/28079 ,  H01L21/28088 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4916 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7813

Abstract: A semiconductor device, method of manufacture of a semiconductor device, and electronic system are disclosed. For example, the semiconductor device includes at least one trench disposed in a semiconductor substrate of the semiconductor device, wherein the semiconductor substrate has a first conductivity type. The semiconductor device further includes a polysilicon depleted gate shield disposed in the at least one trench, wherein the polysilicon depleted gate shield has a second conductivity type. The semiconductor device also includes a drift region disposed in the semiconductor substrate adjacent to at least one sidewall of the at least one trench, wherein the drift region has the first conductivity type, and a polysilicon gate disposed over the depleted gate shield in the at least one trench.

公开(公告)号：US20190165093A1

公开(公告)日：2019-05-30

申请号：US16264336

申请日：2019-01-31

Applicant: Renesas Electronics America Inc.

Inventor： Patrick M. SHEA ,  Samuel J. ANDERSON ,  David N. OKADA

IPC: H01L29/06 ,  H01L29/40 ,  H01L29/66 ,  H01L29/78

Abstract: A semiconductor device has a substrate and a lightly doped drain (LDD) region formed in the substrate. A superjunction is formed in the LDD region.

公开(公告)号：US20190123194A1

公开(公告)日：2019-04-25

申请号：US16231196

申请日：2018-12-21

Applicant: Renesas Electronics America Inc.

Inventor： Patrick M. SHEA

IPC: H01L29/78 ,  H01L29/40 ,  H01L29/49 ,  H01L29/66

CPC classification number: H01L29/7813 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4916 ,  H01L29/66727 ,  H01L29/66734

Abstract: A semiconductor device, method of manufacture of a semiconductor device, and electronic system are disclosed. For example, the semiconductor device includes at least one trench disposed in a semiconductor substrate of the semiconductor device, wherein the semiconductor substrate has a first conductivity type. The semiconductor device further includes a polysilicon depleted gate shield disposed in the at least one trench, wherein the polysilicon depleted gate shield has a second conductivity type. The semiconductor device also includes a drift region disposed in the semiconductor substrate adjacent to at least one sidewall of the at least one trench, wherein the drift region has the first conductivity type, and a polysilicon gate disposed over the depleted gate shield in the at least one trench.