公开(公告)号：US20040232485A1

公开(公告)日：2004-11-25

申请号：US10870921

申请日：2004-06-21

Applicant: Renesas Technology Corp.

Inventor： Hitoshi Akamine ,  Masashi Suzuki ,  Masao Yamane ,  Tetsuaki Adachi

IPC: H01L029/94

CPC classification number: H01L27/0207 ,  H01L23/4824 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L25/16 ,  H01L27/088 ,  H01L29/0696 ,  H01L29/1083 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/4238 ,  H01L29/7835 ,  H01L2223/6644 ,  H01L2223/6688 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/49111 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H03F3/189 ,  H03F3/211 ,  H03F3/601 ,  H03F3/68 ,  H03F3/72 ,  H03F2200/294 ,  H03F2200/372 ,  H01L2224/45015 ,  H01L2924/207

Abstract: The present invention provides a semiconductor device comprising a semiconductor substrate, and transistors formed on the semiconductor substrate, wherein control electrode terminals constituting external electrode terminals of the transistors, and first electrode terminals which transmit output signals, are provided on a main surface of the semiconductor substrate, wherein the control electrode terminals are provided at least one, and a plurality of the first electrode terminals are arranged on one side and a plurality of the first electrode terminals are arranged on the other side with the control electrode terminals being interposed therebetween, wherein a portion including the control electrode terminals and a plurality of the first electrode terminals located on one side of the control electrode terminals constitute a first transistor portion, and wherein a portion including the control electrode terminals and a plurality of the first electrode terminals located on the other side of the control electrode terminals constitute a second transistor portion. The semiconductor device is quadrangular.

Abstract translation: 本发明提供一种半导体器件，包括半导体衬底和形成在半导体衬底上的晶体管，其中构成晶体管的外部电极端子的控制电极端子和传输输出信号的第一电极端子设置在半导体的主表面上 基板，其中控制电极端子设置为至少一个，并且多个第一电极端子布置在一侧，并且多个第一电极端子布置在另一侧，其中控制电极端子插入其间，其中 包括控制电极端子和位于控制电极端子一侧的多个第一电极端子的部分构成第一晶体管部分，并且其中包括控制电极端子和位于第一晶体管部分上的多个第一电极端子的部分 另一边 的控制电极端子构成第二晶体管部分。 半导体器件是四边形。

公开(公告)号：US20040174219A1

公开(公告)日：2004-09-09

申请号：US10799673

申请日：2004-03-15

Applicant: Renesas Technology Corp.

Inventor： Masashi Suzuki ,  Hitoshi Akamine ,  Tetsuaki Adachi ,  Takahiro Sato ,  Masashi Maruyama ,  Susumu Takada

IPC: H03G003/10

CPC classification number: H01L27/0629 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49111 ,  H01L2224/49175 ,  H03F1/301 ,  H03F3/193 ,  H03F2200/294 ,  H03F2200/372 ,  H03G3/3042 ,  H03G2201/103 ,  H03G2201/206 ,  H03G2201/307 ,  H03G2201/40 ,  H01L2924/00014

Abstract: The number of components of a high frequency power amplifier is reduced. A bias resistance ratio is adjusted in accordance with a change in the threshold voltage Vth of a transistor. There is provided a high frequency power amplifier having a plurality of amplifying systems, characterized in that each of the amplifying systems comprises an input terminal to which a signal to be amplified is supplied, an output terminal, a bias terminal, a plurality of amplifying stages which are sequentially cascaded between the input terminal and output terminal, and a bias circuit connected to the bias terminal and each of the amplifying stages to apply a bias potential to the amplifying stage, in that the amplifying stage includes a control terminal for receiving an input signal and the bias potential supplied to the stage and a first terminal for transmitting an output signal of the stage, and in that a first amplifying stage and a second amplifying stage of each of the amplifying systems are monolithically formed on a single semiconductor chip, and a part of bias resistors that constitute bias circuits of the first amplifying stage and second amplifying stage are monolithically formed on the semiconductor chip.

Abstract translation: 高频功率放大器的组件数量减少。 根据晶体管的阈值电压Vth的变化来调整偏置电阻比。 提供了一种具有多个放大系统的高频功率放大器，其特征在于，每个放大系统包括一个输入端，供给放大信号的输入端，输出端，偏置端，多个放大级 它们在输入端子和输出端子之间顺序级联，以及连接到偏置端子和每个放大级的偏置电路，以向放大级施加偏置电位，因为放大级包括用于接收输入端的控制端子 信号和提供给该级的偏置电位和用于发送该级的输出信号的第一端子，并且每个放大系统的第一放大级和第二放大级单片地形成在单个半导体芯片上，以及 构成第一放大级和第二放大级的偏置电路的偏置电阻的一部分是整体式的 y形成在半导体芯片上。