Abstract:
One or more circular debug buffers can allow terminal output data to be provided from the target system to a host without halting the target system or causing significant delays. One or more circular debug buffers may also allow input (such as keyboard input) to be provided from the host to the target without halting the target system or causing significant delays. Accordingly, communications between the target and host may be performed in real time or near real time. These communications may be used for debugging purposes or more generally, for any purpose, including purposes unrelated to debugging.
Abstract:
An electronic torque wrench has inner and outer telescoping housing portions and a battery tray assembly telescopically receivable in the inner housing portion and a bezel assembly receivable in an aperture in the outer housing portion and interconnected with the housing portions and the battery support assembly by a single fastener. The bezel assembly carries torque measuring circuitry including a microcontroller, and a four-key pad including arrow keys for incrementing and decrementing a preset torque level at any time, an on/zero key and a units key for toggling among plural different units of torque measurement. The preset torque level is displayed until torque is applied or a key is pressed and can be changed and displayed at anytime.
Abstract:
An improved real-time operating system (RTOS) design that uses cycle-based scheduling rather than tick-based scheduling is described herein. Using cycle-based scheduling, versus the traditional tick-based scheduling, provides technical benefits to embedded systems. For example, the cycle-based scheduling can change the basic unit of time of the embedded system by increasing the resolution of scheduling. Instead of relying on the system tick used in typical RTOS implementations (e.g., a tick that occurs every 1 millisecond), the improved RTOS design described herein uses CPU cycles internally for some or all operations. Operations such as task delays, timeouts, and/or software timers, which were specified in units of system ticks in typical RTOS implementations, can now be specified in CPU cycles.
Abstract:
One or more circular debug buffers can allow terminal output data to be provided from the target system to a host without halting the target system or causing significant delays. One or more circular debug buffers may also allow input (such as keyboard input) to be provided from the host to the target without halting the target system or causing significant delays. Accordingly, communications between the target and host may be performed in real time or near real time. These communications may be used for debugging purposes or more generally, for any purpose, including purposes unrelated to debugging.
Abstract:
One or more circular debug buffers can allow terminal output data to be provided from the target system to a host without halting the target system or causing significant delays. One or more circular debug buffers may also allow input (such as keyboard input) to be provided from the host to the target without halting the target system or causing significant delays. Accordingly, communications between the target and host may be performed in real time or near real time. These communications may be used for debugging purposes or more generally, for any purpose, including purposes unrelated to debugging.
Abstract:
The invention relates to a method for operating a data processor, especially a single-chip microcontroller, in a test environment (debugger) in which the program code to be tested is modified before, during and/or after the execution of the program to be tested by exchanging individual program instructions, wherein the program instructions are held in a non-volatile and rewritable memory (flash). According to the invention, it is proposed among other things that the temporally or sequentially last command for modifying a program instruction is replaced by a command sequence which causes the data processor to enter the debug mode. The number of rewrite cycles of the non-volatile rewritable memory is hereby minimised in the interactive analysis of the program code to be tested.