公开(公告)号：US20180108621A1

公开(公告)日：2018-04-19

申请号：US15296627

申请日：2016-10-18

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Richard Scott BURTON ,  Karel PTACEK

IPC: H01L23/64 ,  H01L23/00 ,  H01L23/66 ,  H01L23/522

CPC classification number: H01L23/645 ,  H01F2019/085 ,  H01L23/5227 ,  H01L23/66 ,  H01L24/09 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6611 ,  H01L2223/6655 ,  H01L2224/04042 ,  H01L2224/4813 ,  H01L2224/49175 ,  H01L2924/1421 ,  H01L2924/30105 ,  H01L2924/30107

Abstract: Coupled resonators for galvanically isolated signaling between integrated circuit modules. An illustrative multi-module integrated circuit comprises: a transmitter in a first module, the transmitter providing a modulated carrier signal; a receiver in a second module demodulating the modulated carrier signal; and a galvanically isolated signaling path that includes: a first integrated resonator in the first module and a second integrated resonator in the second module, the first and second integrated resonators being resonantly coupled to convey the modulated carrier signal from the transmitter to the receiver. An illustrative embodiment of a method for providing an integrated circuit with a connection terminal for galvanically isolated signaling comprises: equipping the integrated circuit with a transmitter or receiver of a modulated carrier signal; connecting a transfer conductor to the connection terminal; and resonantly coupling the transmitter or receiver to a transfer conductor to convey the modulated carrier signal between the transfer conductor and the transmitter or receiver.

公开(公告)号：US20190319087A1

公开(公告)日：2019-10-17

申请号：US16450036

申请日：2019-06-24

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Richard Scott BURTON ,  Karel PTACEK

IPC: H01L49/02 ,  H01L27/08

Abstract: In accordance with an embodiment, an electrical element includes a first portion of a first dielectric material between a first portion of a first electrical conductor and a first portion of a second electrical conductor and a second portion of the first dielectric material between a second portion of the first electrical conductor and a first portion of a third electrical conductor. In accordance with another embodiment, an electrical component has a plurality of dopant regions formed in a semiconductor material, where the dopant regions include a plurality of dopant regions formed in a dopant region of the same conductivity type. A plurality of dopant regions of an opposite conductivity type are formed in corresponding dopant regions of the first conductivity type. A metallization system is formed over the semiconductor material, where a portion of the metallization system contacts the semiconductor material.

公开(公告)号：US20200294993A1

公开(公告)日：2020-09-17

申请号：US16888037

申请日：2020-05-29

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Shuji FUJIWARA ,  Richard Scott BURTON

IPC: H01L27/02 ,  H01L29/808 ,  H01L29/78 ,  H01L29/06

Abstract: An electrostatic discharge robust semiconductor transistor (transistor) includes a semiconductor substrate of a first conductivity type, a substrate contact region of the first conductivity type coupled with the semiconductor substrate, a source region of a second conductivity type, a channel region of the second conductivity type, a gate region of the first conductivity type, a drain region having a first drain region of the first conductivity type and a second drain region of the second conductivity type, and an electrical conductor coupled over the second drain region and a portion of the first drain region. A portion of the first drain region not covered by the electrical conductor forms a resistive electrical ballast region configured to protect the transistor from electrostatic discharge (ESD) induced voltage pulses. In implementations the transistor includes a silicon controlled rectifier (SCR) junction field effect transistor (SCR JFET) or a laterally diffused metal-oxide semiconductor (SCR LDMOS).

公开(公告)号：US20180109256A1

公开(公告)日：2018-04-19

申请号：US15296660

申请日：2016-10-18

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Richard Scott BURTON ,  Karel PTACEK

IPC: H03K17/691 ,  H03K17/687 ,  H04B1/16

CPC classification number: H03K17/691 ,  H03F3/195 ,  H03F3/45179 ,  H03F2203/45306 ,  H03F2203/45621 ,  H03K17/6872 ,  H04B1/16

Abstract: An illustrative integrated circuit configured for galvanically isolated signaling includes a receiver having: a detector module coupled to receive a differential signal from terminals of a transformer secondary, the detector module responsively presenting an impedance that varies based on a magnitude of the differential signal; a biasing module that converts the detector module impedance to a response signal; and a comparator module that compares the response signal to a reference signal to obtain a detection signal indicative of oscillation in the differential signal. A method of receiving a pulse modulated alternating current (AC) signal from a resonantly-coupled signaling path comprises: supplying balanced quiescent currents from a cross-coupled FET pair in a common gate amplifier configuration thereby obtaining an impedance that varies based on an AC signal magnitude; converting the impedance into a response signal; and comparing the response signal to a reference signal to obtain a detection signal representing pulses in the differential AC signal.

公开(公告)号：US20180240761A1

公开(公告)日：2018-08-23

申请号：US15957153

申请日：2018-04-19

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Richard Scott BURTON ,  Karel PTACEK

IPC: H01L23/64 ,  H01L23/00 ,  H01L23/522 ,  H01L23/66

CPC classification number: H01L23/645 ,  H01F2019/085 ,  H01L23/5227 ,  H01L23/66 ,  H01L24/09 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6611 ,  H01L2223/6655 ,  H01L2224/04042 ,  H01L2224/4813 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/1421 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2224/45099

Abstract: Coupled resonators for galvanically isolated signaling between integrated circuit modules. An illustrative system embodiment includes first and second integrated circuits. The first integrated circuit includes: a transmitter that produces a modulated carrier signal on a primary conductor; a first transfer conductor connected to a first connection terminal; and a first floating loop electromagnetically coupled to the primary conductor and to the transfer conductor to convey the modulated carrier. The second integrated circuit includes: a second transfer conductor connected to a second connection terminal, the second connection terminal being electrically connected to the first connection terminal; a receiver that demodulates the modulated carrier signal; and a second floating loop electromagnetically coupled to the second transfer conductor and to the receiver to convey the modulated carrier signal to the receiver. The first and second floating loops are each resonant at the carrier frequency to provide resonance-coupled signalling between the integrated circuits.

公开(公告)号：US20180109257A1

公开(公告)日：2018-04-19

申请号：US15790196

申请日：2017-10-23

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Richard Scott BURTON ,  Karel PTACEK

IPC: H03K17/691 ,  H04B1/16 ,  H03K17/687

CPC classification number: H03K17/691 ,  H03F3/195 ,  H03F3/45179 ,  H03F2203/45306 ,  H03F2203/45621 ,  H03K17/6872 ,  H04B1/16

Abstract: An illustrative embodiment of an integrated circuit configured for galvanically isolated signaling includes a transfer conductor carrying a modulated carrier signal. A floating transfer loop is electromagnetically coupled to the transfer conductor to receive the modulated carrier signal. The floating transfer loop includes a primary of a step-up transformer. A receiver is coupled to a secondary of the step-up transformer to receive the modulated carrier signal in an amplified, differential fashion, and to demodulate the modulated carrier signal to obtain a digital receive signal.

公开(公告)号：US20170077083A1

公开(公告)日：2017-03-16

申请号：US14852912

申请日：2015-09-14

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Shuji FUJIWARA ,  Richard Scott BURTON

IPC: H01L27/02 ,  H01L29/78 ,  H01L29/06 ,  H01L29/808

CPC classification number: H01L27/0266 ,  H01L27/0262 ,  H01L29/0692 ,  H01L29/7816 ,  H01L29/808

Abstract: An electrostatic discharge robust semiconductor transistor (transistor) includes a semiconductor substrate of a first conductivity type, a substrate contact region of the first conductivity type coupled with the semiconductor substrate, a source region of a second conductivity type, a channel region of the second conductivity type, a gate region of the first conductivity type, a drain region having a first drain region of the first conductivity type and a second drain region of the second conductivity type, and an electrical conductor coupled over the second drain region and a portion of the first drain region. A portion of the first drain region not covered by the electrical conductor forms a resistive electrical ballast region configured to protect the transistor from electrostatic discharge (ESD) induced voltage pulses. In implementations the transistor includes a silicon controlled rectifier (SCR) junction field effect transistor (SCR JFET) or a laterally diffused metal-oxide semiconductor (SCR LDMOS).

Abstract translation: 静电放电坚固的半导体晶体管（晶体管）包括第一导电类型的半导体衬底，与半导体衬底耦合的第一导电类型的衬底接触区域，第二导电类型的源极区域，第二导电类型的沟道区域 类型，第一导电类型的栅极区域，具有第一导电类型的第一漏极区域和第二导电类型的第二漏极区域的漏极区域，以及耦合在第二漏极区域上的一部分电导体 第一漏区。 未被电导体覆盖的第一漏极区域的一部分形成电阻电气镇流器区域，其被配置为保护晶体管免受静电放电（ESD）感应的电压脉冲的影响。 在实现中，晶体管包括可控硅整流器（SCR）结场效应晶体管（SCR JFET）或横向扩散的金属氧化物半导体（SCR LDMOS）。