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    OUTPUT DRIVER HAVING PULL-DOWN CAPABILITY
    1.
    发明申请
    OUTPUT DRIVER HAVING PULL-DOWN CAPABILITY 审中-公开

    公开(公告)号：US20190207603A1

    公开(公告)日：2019-07-04

    申请号：US16295755

    申请日：2019-03-07

    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

    Inventor： Karel PTACEK

    IPC: H03K17/687 ,  H03K19/0185 ,  H02M3/07 ,  H03K19/003

    Abstract: A pull-down circuit includes a control circuit generating an activation signal in response to a supply voltage, a first reference voltage, and a feedback signal, and a charge pump configured to generate a control signal in response to the activation signal and control a switching device using the control signal. The switching device is a field-effect transistor (FET) and is coupled to a power switch and pulls down a voltage level of a gate of the power switch to prevent a premature turn-on of the power switch.

    RECEIVER FOR RESONANCE-COUPLED SIGNALING
    2.
    发明申请
    RECEIVER FOR RESONANCE-COUPLED SIGNALING 有权

    公开(公告)号：US20180109256A1

    公开(公告)日：2018-04-19

    申请号：US15296660

    申请日：2016-10-18

    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

    Inventor： Richard Scott BURTON ,  Karel PTACEK

    IPC: H03K17/691 ,  H03K17/687 ,  H04B1/16

    CPC classification number: H03K17/691 ,  H03F3/195 ,  H03F3/45179 ,  H03F2203/45306 ,  H03F2203/45621 ,  H03K17/6872 ,  H04B1/16

    Abstract: An illustrative integrated circuit configured for galvanically isolated signaling includes a receiver having: a detector module coupled to receive a differential signal from terminals of a transformer secondary, the detector module responsively presenting an impedance that varies based on a magnitude of the differential signal; a biasing module that converts the detector module impedance to a response signal; and a comparator module that compares the response signal to a reference signal to obtain a detection signal indicative of oscillation in the differential signal. A method of receiving a pulse modulated alternating current (AC) signal from a resonantly-coupled signaling path comprises: supplying balanced quiescent currents from a cross-coupled FET pair in a common gate amplifier configuration thereby obtaining an impedance that varies based on an AC signal magnitude; converting the impedance into a response signal; and comparing the response signal to a reference signal to obtain a detection signal representing pulses in the differential AC signal.

    BOOTSTRAP CLAMP CIRCUIT AND METHOD
    4.
    发明公开
    BOOTSTRAP CLAMP CIRCUIT AND METHOD 审中-公开

    公开(公告)号：US20240097555A1

    公开(公告)日：2024-03-21

    申请号：US17933935

    申请日：2022-09-21

    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

    Inventor： Karel PTACEK ,  Dhruv CHOPRA

    IPC: H02M1/088 ,  H02M1/00

    CPC classification number: H02M1/088 ,  H02M1/0006

    Abstract: A driver is suitable for use with a gallium nitride (GaN) power stage, and includes a voltage regulator and a high side driver. The voltage regulator provides a boot voltage between first and second terminals thereof that varies within a range between a turn-on voltage of a GaN transistor, and a safe voltage limit between a gate and a source thereof throughout an active time of said GaN transistor. The high side driver has an input for receiving a high side drive signal, an output for coupling to said gate of said GaN transistor, a power supply terminal coupled to said first terminal of said voltage regulator, and a ground terminal for coupled to said second terminal of said voltage regulator.

    HIGH VOLTAGE CAPACITOR AND METHOD
    5.
    发明申请
    HIGH VOLTAGE CAPACITOR AND METHOD 审中-公开

    公开(公告)号：US20190319087A1

    公开(公告)日：2019-10-17

    申请号：US16450036

    申请日：2019-06-24

    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

    Inventor： Richard Scott BURTON ,  Karel PTACEK

    IPC: H01L49/02 ,  H01L27/08

    Abstract: In accordance with an embodiment, an electrical element includes a first portion of a first dielectric material between a first portion of a first electrical conductor and a first portion of a second electrical conductor and a second portion of the first dielectric material between a second portion of the first electrical conductor and a first portion of a third electrical conductor. In accordance with another embodiment, an electrical component has a plurality of dopant regions formed in a semiconductor material, where the dopant regions include a plurality of dopant regions formed in a dopant region of the same conductivity type. A plurality of dopant regions of an opposite conductivity type are formed in corresponding dopant regions of the first conductivity type. A metallization system is formed over the semiconductor material, where a portion of the metallization system contacts the semiconductor material.

    SWITCHING DEVICE CONTROL WITH SECOND ASSERTION OF DRIVE SIGNAL DURING CONDUCTION PHASE
    6.
    发明申请
    SWITCHING DEVICE CONTROL WITH SECOND ASSERTION OF DRIVE SIGNAL DURING CONDUCTION PHASE 审中-公开

    公开(公告)号：US20180323719A1

    公开(公告)日：2018-11-08

    申请号：US16039521

    申请日：2018-07-19

    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

    Inventor： Karel PTACEK ,  Tomas TICHY

    IPC: H02M3/335 ,  H02M1/08 ,  H02M1/00

    CPC classification number: H02M3/33523 ,  H02M1/08 ,  H02M3/33592 ,  H02M2001/0009 ,  Y02B70/1475

    Abstract: A synchronous rectifier controller includes an exception timer, one or more blanking timers, and control logic. The control logic may detect a beginning of a conduction phase using a current sense signal. In response to detecting the beginning of the conduction phase, the control logic commences the exception timer, commences a first blanking interval, and asserts the drive signal. In response to an OFF condition being detected, the first blanking interval being elapsed, and the exception timer being running, the control logic de-asserts the drive signal and commences a second blanking interval. In response to an ON condition being detected, the second blanking interval being elapsed, and the exception timer being running, the control logic commences a third blanking interval and asserts the drive signal. The control logic may assert and de-assert the drive signal multiple times while the exception timer is running.

    ADAPTIVE PULSE CONTROL FOR HIGH-VOLTAGE LEVEL SHIFTERS
    7.
    发明申请
    ADAPTIVE PULSE CONTROL FOR HIGH-VOLTAGE LEVEL SHIFTERS 有权

    公开(公告)号：US20250080116A1

    公开(公告)日：2025-03-06

    申请号：US18462240

    申请日：2023-09-06

    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

    Inventor： Karel PTACEK ,  Jaroslav KNOP

    IPC: H03K19/0185 ,  H02M1/08 ,  H02M3/158 ,  H03K17/081

    Abstract: Signal converters, systems for power conversion, and methods for adaptive pulse control. The signal converter includes a pulse generator, a level shifter, and a controller. The pulse generator is configured to receive an input control signal for a switch driver. The pulse generator is also configured to generate a set control signal based on the input control signal. The level shifter is configured to generate, based on the set control signal, an output control signal having a first amplitude greater than a second amplitude of the input control signal. The level shifter is also configured to send the output control signal to the switch driver. The controller is configured to detect a common mode transient at a node coupled to the switch driver. The pulse generator is further configured to increase a pulse width of the set control signal when the controller detects the common mode transient.

    SWITCHING SLEW RATE CONTROL FOR GATE DRIVERS
    9.
    发明公开
    SWITCHING SLEW RATE CONTROL FOR GATE DRIVERS 审中-公开

    公开(公告)号：US20230223850A1

    公开(公告)日：2023-07-13

    申请号：US17647631

    申请日：2022-01-11

    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

    Inventor： Karel PTACEK ,  Roman STULER ,  Roman RADVAN

    IPC: H02M3/158 ,  H02M1/00 ,  H02M1/08 ,  H03K17/16

    CPC classification number: H02M3/158 ,  H02M1/0029 ,  H02M1/0009 ,  H02M1/08 ,  H03K17/162 ,  H02M1/0025

    Abstract: Switching circuits, half-bridge power converters, and methods for operating a switching circuit including a switching transistor coupled to a load. The method includes applying, with a driver, a gate voltage to the switching transistor. The method also includes generating, with a feedback capacitor, a feedback current based on a change in a voltage sensed at a drain terminal of the switching transistor when the switching transistor turns on. The method further includes applying the feedback current to the driver to limit the gate voltage applied to the switching transistor. The method also includes adjusting, with a controller, a switching slew rate of the switching transistor by draining an amount of the feedback current.

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