公开(公告)号：US20210051287A1

公开(公告)日：2021-02-18

申请号：US16827960

申请日：2020-03-24

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Roger PANICACCI ,  Tim CHAN

IPC: H04N5/369 ,  H04N5/378 ,  H04N5/3745

Abstract: Imaging circuitry may include circuits for implementing current or voltage mode feature extraction in the analog domain. The imaging circuitry may include pixels configured to generate pixel values. The pixel values may then be weighted using adjustable weighting circuits to generate corresponding weighted pixel values. The adjustable weighting circuits may be selectively coupled to the floating diffusion node in each pixel. The weighted pixels values may then be combined to obtain an output neuron voltage for at least one layer in a neural network. Performing feature extraction in the analog domain for each layer of results in the neural network saves power and area by avoiding the need to move data around to conventional digital memories.