公开(公告)号：US20210014438A1

公开(公告)日：2021-01-14

申请号：US16661009

申请日：2019-10-23

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Dajiang YANG ,  Sergey VELICHKO ,  Bartosz Piotr BANACHOWICZ ,  Tomas GEURTS ,  Muhammad Maksudur RAHMAN

IPC: H04N5/355 ,  H01L27/146

Abstract: An image sensor may include an array of image sensor pixels. Each pixel in the array may be a global shutter pixel having a first charge storage node configured to capture scenery information and a second charge storage node configured to capture background information generated as a result of parasitic light and dark noise signals. The first and/or second charge storage nodes may each be provided with an overflow charge storage to provide high dynamic range (HDR) functionality. The background information may be subtracted from the scenery information to cancel out the desired background signal contribution and to obtain an HDR signal with high global shutter efficiency. The charge storage nodes may be implemented as storage diode or storage gate devices. The pixels may be backside illuminated pixels with optical diffracting structures and multiple microlenses formed at the backside to distribute light equally between the two charge storage nodes.

公开(公告)号：US20180366507A1

公开(公告)日：2018-12-20

申请号：US16116380

申请日：2018-08-29

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Marko MLINAR ,  Tomas GEURTS

IPC: H01L27/146 ,  H04N9/04 ,  H04N5/33 ,  G01J5/08 ,  H04N5/225

CPC classification number: H01L27/14627 ,  G01J3/2803 ,  G01J3/36 ,  G01J5/0862 ,  G01J2003/2806 ,  H01L27/14621 ,  H01L27/14643 ,  H01L27/14645 ,  H01L27/14649 ,  H04N5/2257 ,  H04N5/33 ,  H04N5/347 ,  H04N9/045 ,  H04N9/04553

Abstract: An image sensor may include an array of imaging pixels and an array of color filter elements that covers the array of imaging pixels. The array of imaging pixels may include visible light pixels that are covered by visible light color filter elements and near-infrared light pixels that are covered by near-infrared light color filter elements. The imaging pixels may be arranged in a pattern having a repeating 2×2 unit cell of pixel groups. Each pixel group may include a visible light pixel sub-group and a near-infrared light pixel sub-group. Signals from each pixel group may be processed to determine a representative value for each pixel group that includes both visible light and near-infrared light information.

公开(公告)号：US20170366766A1

公开(公告)日：2017-12-21

申请号：US15184458

申请日：2016-06-16

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Tomas GEURTS ,  Manuel INNOCENT

IPC: H04N5/355 ,  H04N5/353 ,  H04N5/372 ,  H04N5/378

CPC classification number: H04N5/35581 ,  H04N5/3532 ,  H04N5/372 ,  H04N5/3745 ,  H04N5/378

Abstract: The image sensor pixel may include a photodiode, a charge storage region, readout circuitry, and a transfer transistor that couples the photodiode to the charge storage region. The photodiode may generate first and second image signals during first and second exposure periods, respectively. The transfer transistor may transfer the first image signal to the charge storage region. While generating the second image signal, the readout circuitry may perform readout operations on the first image signal. Thereafter, the charge storage region may be reset to a reset voltage level. The readout circuitry may perform readout operations on the reset voltage level. Then, transfer transistor may transfer the second image signal to the charge storage region. The readout circuitry may perform readout operations on the second image signal. The readout operations on both the first and second image signals may be double sampling readouts.

公开(公告)号：US20170324915A1

公开(公告)日：2017-11-09

申请号：US15145558

申请日：2016-05-03

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Tomas GEURTS

IPC: H04N5/353 ,  H04N5/372 ,  H04N5/369

CPC classification number: H04N5/3532 ,  H04N5/145 ,  H04N5/35563 ,  H04N5/3559 ,  H04N5/3698 ,  H04N5/372 ,  H04N5/3745

Abstract: An image sensor may include pixel having nested photosensitive regions. A pixel with nested photosensitive regions may include an inner photosensitive region that has a rectangular light collecting area. The inner photosensitive region may be formed in a substrate and may be surrounded by an outer photosensitive region. The pixel with nested photosensitive regions may include trunk circuitry and transistor circuitry. Trunk circuitry may include a voltage supply source, a charge storage node, and readout transistors. Trunk circuitry may be located in close proximity to both the inner and outer photosensitive regions. Transistor circuitry may couple the inner photosensitive region, the outer photosensitive region, and trunk circuitry to one another. Microlenses may be formed over the nested photosensitive groups. Hybrid color filters having a single color filter region over the inner photosensitive region and a portion of the outer photosensitive region may also be used.

公开(公告)号：US20170150017A1

公开(公告)日：2017-05-25

申请号：US15140038

申请日：2016-04-27

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Tomas GEURTS ,  Richard Scott JOHNSON ,  Manuel INNOCENT

IPC: H04N5/225 ,  H04N5/369 ,  H04N5/372 ,  H04N5/235 ,  H04N5/376

CPC classification number: H04N5/2253 ,  H04N5/2355 ,  H04N5/3559 ,  H04N5/359 ,  H04N5/3698 ,  H04N5/372 ,  H04N5/3745 ,  H04N5/37452 ,  H04N5/3765

Abstract: An image sensor may include one or more pixels having a coupled gate structure that may selectively route overflow charge from a photodiode to increase the dynamic range of the pixel. The coupled gate structure may include two, three or four transistors. During charge accumulation in the pixel, overflow charge may pass from a photodiode to the coupled gate structure to be selectively routed to one of a plurality of paths. Timing of control signals for a subset of the transistors in the coupled gate structure may alternate such that only one transistor is active to pass charge to one of the plurality of paths at any given time. Depending on the selected path, overflow charge may be routed to a pixel voltage supply or to one or more storage nodes in the pixel. Pixels may also include a dual-gain structure, which may provide additional charge storage capacity.

公开(公告)号：US20240234471A1

公开(公告)日：2024-07-11

申请号：US18151595

申请日：2023-01-09

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Tomas GEURTS ,  Swarnal BORTHAKUR

IPC: H01L27/146

CPC classification number: H01L27/1464 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/14685

Abstract: A semiconductor device may include a primary circuit chip and an image sensor chip stacked thereon. The image sensor chip may have a backside illuminated (BSI) surface and a frontside surface opposed to the BSI surface, with the image sensor chip being disposed on the primary circuit chip with the frontside surface facing the primary circuit chip. An auxiliary chip may be disposed on the BSI surface of the image sensor chip and connected to the primary circuit chip through the image sensor chip.

公开(公告)号：US20220264042A1

公开(公告)日：2022-08-18

申请号：US17649815

申请日：2022-02-03

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Manuel H. INNOCENT ,  Tomas GEURTS ,  Genis CHAPINAL GOMEZ ,  Tze Ching FUNG ,  Bartosz Piotr BANACHOWICZ

IPC: H04N5/378 ,  H04N5/355 ,  H01L27/146

Abstract: An image sensor may include an array of image pixels. The array of image pixel may be coupled to row control circuitry and column readout circuitry. An image pixel in the array may include a charge integration portion having a photodiode, a floating diffusion region, and a capacitor coupled to the floating diffusion region and may include a voltage-domain sampling portion having three capacitors. High light and low light image level and reset level signals may be sampled and stored at the voltage-domain sampling portion before being readout to the column readout circuitry during a readout operation. The high light reset level signal may be sampled and stored during the readout operation.

公开(公告)号：US20220093667A1

公开(公告)日：2022-03-24

申请号：US17029682

申请日：2020-09-23

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Manuel H. INNOCENT ,  Tomas GEURTS ,  David T. PRICE

IPC: H01L27/146

Abstract: Implementations of a semiconductor device may include a photodiode included in a second epitaxial layer of a semiconductor substrate; light shield coupled over the photodiode; and a first epitaxial layer located in one or more openings in the light shield. The first epitaxial layer and the second epitaxial layer may form a single crystal.

公开(公告)号：US20200227454A1

公开(公告)日：2020-07-16

申请号：US16244250

申请日：2019-01-10

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Tomas GEURTS

IPC: H01L27/146 ,  H04N5/355

Abstract: An image sensor may include a plurality of imaging pixels with high dynamic range. Each imaging pixel may have a photodiode, a floating diffusion region, and a transfer transistor configured to transfer charge from the photodiode to the floating diffusion region. Each imaging pixel may also include an overflow capacitor and an overflow transistor interposed between the photodiode and the overflow capacitor. A dual conversion gain transistor may be interposed between the overflow capacitor and the floating diffusion region. To reduce noise associated with operation of the pixel, a ring-shaped conductive layer may form a gate for both the overflow transistor and the dual conversion gain transistor. This common gate may be set to an intermediate level during integration to allow charge to overflow past the overflow transistor to the overflow capacitor. The common gate may also be used to assert the dual conversion gain transistor.

公开(公告)号：US20200045250A1

公开(公告)日：2020-02-06

申请号：US16598219

申请日：2019-10-10

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Tomas GEURTS

IPC: H04N5/345 ,  H04N5/359 ,  H04N5/355 ,  H04N5/353 ,  H04N5/378

Abstract: Image sensors may include pixel circuitry to enable per-pixel integration time and read-out control. Two transistors may be coupled in series for per-pixel control, with one of the transistors being controlled on a row-by-row basis and the other transistor being controlled on a column-by-column basis. The two transistors in series may be coupled directly to each other without any intervening structures. Two transistors in series between a photodiode and a power supply terminal enables per-pixel control of starting an integration time, two transistors in series between a photodiode and a charge storage region enables per-pixel control of ending an integration time, and two transistors in series between a charge storage region and a floating diffusion region enables per-pixel control of read-out.