公开(公告)号：US20230413582A1

公开(公告)日：2023-12-21

申请号：US18058561

申请日：2022-11-23

Applicant: SK hynix Inc.

Inventor： Young-In BAE ,  Jong Chul LEE ,  Nam Joo KIM ,  Hong Seuk LEE

IPC: H10B63/00 ,  H10N70/00

CPC classification number: H10B63/84 ,  H10N70/883 ,  H10N70/021

Abstract: A method for fabricating a semiconductor device, may include: providing a substrate; forming a first stacked structure over the substrate, the first stacked structure including a plurality of first lower lines extending in a first direction, a plurality of first upper lines disposed over the first lower lines and extending in a second direction intersecting the first direction, and a plurality of first memory cells respectively disposed at intersection regions between the first lower lines and the first upper lines; forming a first insulating layer filled between the first memory cells and between the first upper lines; forming a first space by recessing the first insulating layer to expose side surfaces of the first upper lines; and forming a second insulating layer having a higher etch resistance than the first insulating layer while filling the first space.