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    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SEMICONDUCTOR DEVICE
    1.
    发明申请
    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20240414920A1

    公开(公告)日：2024-12-12

    申请号：US18812752

    申请日：2024-08-22

    Applicant: SK hynix Inc.

    Inventor： Jin Ha KIM

    IPC: H10B43/27 ,  H10B41/27 ,  H10B63/00

    Abstract: A semiconductor device includes a stacked structure including conductive layers and insulating layers alternately stacked with each other, and a channel layer passing through the stacked structure, wherein the channel layer is a single layer, the single layer including a first GIDL region, a cell region, and a second GIDL region, and the first GIDL region has a greater thickness than each of the cell region and the second GIDL region.

    SEMICONDUCTOR MEMORY DEVICE
    2.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 有权

    公开(公告)号：US20210151404A1

    公开(公告)日：2021-05-20

    申请号：US16846927

    申请日：2020-04-13

    Applicant: SK hynix Inc.

    Inventor： Jin Ha KIM

    IPC: H01L23/00 ,  H01L25/065 ,  H01L25/18

    Abstract: A semiconductor memory device includes a first chip having a peripheral transistor and a first insulating layer, and includes a second chip having a stacked structure and a second insulating layer. The stacked structure includes conductive patterns and insulating patterns alternately stacked with each other, the first insulating layer includes a first bonding surface, the second insulating layer includes a second bonding surface contacting the first bonding surface, and the second chip further includes a protrusion protruding from the second bonding surface of the second insulating layer toward the first insulating layer.

    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    3.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20210134956A1

    公开(公告)日：2021-05-06

    申请号：US16917666

    申请日：2020-06-30

    Applicant: SK hynix Inc.

    Inventor： Jin Ha KIM

    IPC: H01L29/10 ,  H01L27/11556 ,  H01L27/11582 ,  H01L27/24 ,  H01L25/065 ,  H01L25/18 ,  H01L23/00

    Abstract: A semiconductor device includes a stack including alternately stacked conductive films and insulating films, wherein the stack includes an opening penetrating the conductive films and the insulating films, and wherein the stack includes a rounded corner that is exposed to the opening. The semiconductor device also includes a first channel film formed in the opening and including a first curved surface surrounding the rounded corner. The semiconductor device further includes a conductive pad formed in the opening, and a second channel film interposed between the first curved surface of the first channel film and the conductive pad.

    3D SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME
    9.
    发明申请
    3D SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
    3D半导体集成电路装置及其制造方法

    公开(公告)号：US20160042960A1

    公开(公告)日：2016-02-11

    申请号：US14540866

    申请日：2014-11-13

    Applicant: SK hynix Inc.

    Inventor： Jin Ha KIM ,  Jun Kwan KIM ,  Kang Sik CHOI ,  Su Jin CHAE ,  Young Ho LEE

    IPC: H01L21/285 ,  H01L29/78 ,  H01L29/45 ,  H01L27/24

    CPC classification number: H01L29/7827 ,  H01L21/28518 ,  H01L21/28531 ,  H01L21/76843 ,  H01L21/76855 ,  H01L27/2454 ,  H01L29/456

    Abstract: A 3D semiconductor integrated circuit device and a method of manufacturing the same are provided. An active pillar is formed on a semiconductor substrate, and an interlayer insulating layer is formed so that the active pillar is buried in the interlayer insulating layer. The interlayer insulating layer is etched to form a hole so that the active pillar and a peripheral region of the active pillar are exposed. An etching process is performed on the peripheral region of the active pillar exposed through the hole by a certain depth, and a space having the depth is provided between the active pillar and the interlayer insulating layer. A silicon material layer is formed to be buried in the space having the depth, and an ohmic contact layer is formed on the silicon material layer and the active pillar.

    Abstract translation: 提供了一种3D半导体集成电路器件及其制造方法。 在半导体衬底上形成有源柱，并且形成层间绝缘层，使得有源柱埋在层间绝缘层中。 蚀刻层间绝缘层以形成孔，使得活性柱和活性柱的周边区域露出。 在通过孔暴露一定深度的有源柱的周边区域进行蚀刻处理，并且在有源柱和层间绝缘层之间设置具有深度的空间。 形成硅材料层以埋在具有深度的空间中，并且在硅材料层和有源支柱上形成欧姆接触层。

    SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR MEMORY DEVICE
    10.
    发明公开
    SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR MEMORY DEVICE 审中-公开

    公开(公告)号：US20240023330A1

    公开(公告)日：2024-01-18

    申请号：US18097001

    申请日：2023-01-13

    Applicant: SK hynix Inc.

    Inventor： Jin Ha KIM

    IPC: H10B43/27 ,  G11C16/04 ,  H10B41/27

    CPC classification number: H10B43/27 ,  G11C16/0483 ,  H10B41/27

    Abstract: There are provided a semiconductor memory device and a manufacturing method of a semiconductor memory device. The manufacturing method of the semiconductor memory device includes: stacking a plurality of first material layers and a plurality of second material layers over a preliminary doped semiconductor structure; forming a blocking insulating layer, a data storage layer, a tunnel insulating layer, and a channel layer, which penetrate the plurality of first and second material layers, and extend to the inside of the preliminary doped semiconductor structure; forming a slit penetrating the plurality of first and second material layers; forming a protective structure as a double layer or a single layer on a sidewall of the slit; and forming a doped channel contact layer which penetrates a portion of the preliminary doped semiconductor structure in a direction intersecting the channel layer, and is in contact with the channel layer.

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