公开(公告)号：US20240120292A1

公开(公告)日：2024-04-11

申请号：US18186274

申请日：2023-03-20

Applicant: SK hynix Inc.

Inventor： Jin Woong KIM ,  Jong Yeon KIM

IPC: H01L23/00 ,  H01L23/48

CPC classification number: H01L23/562 ,  H01L23/481 ,  H01L24/08 ,  H01L2224/08145

Abstract: A stack package includes a first die stack including first dies, a second die stack including second dies, and an insert die between the first die stack and the second die stack, wherein the insert die is thicker than each of the first and second dies.

公开(公告)号：US20240087634A1

公开(公告)日：2024-03-14

申请号：US18510656

申请日：2023-11-16

Applicant: SK hynix Inc.

Inventor： Jin Woong KIM ,  Ji Hoon YIM

IPC: G11C11/406 ,  G11C11/4093 ,  G11C16/16 ,  G11C16/34

CPC classification number: G11C11/40607 ,  G11C11/40615 ,  G11C11/4093 ,  G11C16/16 ,  G11C16/3409

Abstract: A storage device comprising: a nonvolatile memory device including a plurality of memory blocks; and a device controller configured to control the nonvolatile memory device to determine a memory block to perform a refresh operation and to control the memory block to perform the refresh operation to recover data of the memory block.

公开(公告)号：US20230130929A1

公开(公告)日：2023-04-27

申请号：US17707654

申请日：2022-03-29

Applicant: SK hynix Inc.

Inventor： Jin Woong KIM ,  Sung Kyu KIM

IPC: H01L23/00 ,  H01L21/768

Abstract: A method of manufacturing a semiconductor device includes forming a first through via surrounded by a liner in a first semiconductor substrate, first-recessing the semiconductor substrate to expose a first portion of the liner covering an end portion of the first through via, and forming a first diffusion barrier layer covering the first-recessed first semiconductor substrate and exposing a second portion of the liner. The method also includes removing the second portion of the liner and second-recessing the first diffusion barrier layer. The method further includes forming a second diffusion barrier layer that covers the second-recessed first diffusion barrier layer and a top portion of the liner from which the second portion is removed and exposes a top surface of the end portion of the first through via.

公开(公告)号：US20220102193A1

公开(公告)日：2022-03-31

申请号：US17152390

申请日：2021-01-19

Applicant: SK hynix Inc.

Inventor： Jin Woong KIM

IPC: H01L21/762 ,  H01L21/02 ,  H01L27/108

Abstract: A semiconductor device including: a trench defining an active region in a substrate; a first semiconductor liner formed over the trench; a second semiconductor liner formed over the first semiconductor liner; and a device isolation layer formed over the second semiconductor liner and filling the trench. Disclosed is also a method for fabricating a semiconductor device, the method including: forming a trench defining an active region in a substrate; forming a plurality of semiconductor liners over the trench; performing pretreatment before forming each of the semiconductor liners; and performing post-treatment after forming each of the semiconductor liners.

公开(公告)号：US20190189193A1

公开(公告)日：2019-06-20

申请号：US16032492

申请日：2018-07-11

Applicant: SK hynix Inc.

Inventor： Jin Woong KIM ,  Ji Hoon YIM

IPC: G11C11/406 ,  G11C16/34 ,  G06F3/06

Abstract: A data storage device includes a nonvolatile memory device including a plurality of memory blocks; and a device controller configured to control the nonvolatile memory device such that, when a first refresh scan command is received from a host device, a first refresh scan operation for the plurality of memory blocks is performed and then a first refresh scan result for the first refresh scan operation is transmitted to the host device, and when a first refresh operation command is received from the host device, a first refresh operation for the nonvolatile memory device is performed.

公开(公告)号：US20170131925A1

公开(公告)日：2017-05-11

申请号：US15002083

申请日：2016-01-20

Applicant: SK hynix Inc.

Inventor： Soo Nyun KIM ,  Jin Woong KIM

IPC: G06F3/06 ,  G06F12/02

CPC classification number: G06F3/0619 ,  G06F3/0608 ,  G06F3/065 ,  G06F3/0665 ,  G06F3/0679 ,  G06F3/0688 ,  G06F12/0246 ,  G06F2212/7201 ,  G06F2212/7209

Abstract: A data storage device includes a nonvolatile memory device, and a controller configured to construct logical address sets each including a start logical address and valid address flags corresponding to the start logical address, from logical addresses provided from a host device, generate an address mapping table by mapping each of the logical address sets to a physical address of the nonvolatile memory device, and perform a request from the host device, by referring to the address mapping table.

公开(公告)号：US20160170648A1

公开(公告)日：2016-06-16

申请号：US14667357

申请日：2015-03-24

Applicant: SK hynix Inc.

Inventor： Jin Woong KIM ,  Byeong Gyu PARK

IPC: G06F3/06 ,  G06F12/10

CPC classification number: G06F3/0604 ,  G06F3/0653 ,  G06F3/0673 ,  G06F12/0246 ,  G06F12/1009 ,  G06F2212/1041 ,  G06F2212/657 ,  G06F2212/7201 ,  G06F2212/7205 ,  G06F2212/7209

Abstract: An operating method of a data storage device includes receiving a read request from a host device, and selectively collecting position information of read-requested data.

Abstract translation: 数据存储装置的操作方法包括从主机装置接收读请求，并选择性地收集读请求数据的位置信息。

公开(公告)号：US20240395552A1

公开(公告)日：2024-11-28

申请号：US18489001

申请日：2023-10-18

Applicant: SK hynix Inc.

Inventor： Jin Woong KIM

IPC: H01L21/033 ,  H01L21/3213 ,  H01L21/762

Abstract: A method of forming a mask pattern may include forming a sacrificial mask pattern on a substrate. A plurality of upper mask patterns may be formed on side surfaces of the sacrificial mask pattern. Each of the plurality of upper mask patterns may include a surface enhancement layer and an upper mask layer. The upper mask layer may be formed between the surface enhancement layer and the sacrificial mask pattern. By removing the sacrificial mask pattern, the plurality of upper mask patterns may be exposed.

公开(公告)号：US20240096392A1

公开(公告)日：2024-03-21

申请号：US18509301

申请日：2023-11-15

Applicant: SK hynix Inc.

Inventor： Jin Woong KIM ,  Ji Hoon YIM

IPC: G11C11/406 ,  G11C11/4093 ,  G11C16/16 ,  G11C16/34

CPC classification number: G11C11/40607 ,  G11C11/40615 ,  G11C11/4093 ,  G11C16/16 ,  G11C16/3409

Abstract: A data storage device includes a nonvolatile memory device including a plurality of memory blocks; and a device controller configured to control the nonvolatile memory device such that, when a first refresh scan command is received from a host device, a first refresh scan operation for the plurality of memory blocks is performed and then a first refresh scan result for the first refresh scan operation is transmitted to the host device, and when a first refresh operation command is received from the host device, a first refresh operation for the nonvolatile memory device is performed.

公开(公告)号：US20230298937A1

公开(公告)日：2023-09-21

申请号：US17962687

申请日：2022-10-10

Applicant: SK hynix Inc.

Inventor： Jin Woong KIM ,  Ju Heon YANG

IPC: H01L21/768 ,  H01L23/48

CPC classification number: H01L21/76898 ,  H01L23/481 ,  H01L21/7684 ,  H01L2224/13147 ,  H01L24/13

Abstract: There is provided a semiconductor device including through vias and a method of manufacturing the same. The semiconductor device includes a substrate including a first via hole and a second via hole, a first through via formed in the first via hole, a second through via formed in the second via hole, an insulating layer first portion formed between a sidewall surface of the first via hole and the first through via, and an insulating layer second portion formed between a sidewall surface of the second via hole and the second through via. The insulating layer second portion is thinner than the insulating layer first portion, and the second through via is wider than the first through via,