公开(公告)号：US11899973B2

公开(公告)日：2024-02-13

申请号：US17506326

申请日：2021-10-20

Applicant: SK hynix Inc.

Inventor： Min Jun Jang

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/064 ,  G06F3/0604 ,  G06F3/0679

Abstract: A controller controls a semiconductor memory device including a plurality of memory blocks. The controller includes a block manager, a map data manager, and a command generator. The block manager manages information on the plurality of memory blocks. The map data manager manages map data for data stored in the plurality of memory blocks. The command generator generates a program command for controlling a program operation of the semiconductor memory device. The command generator generates a program command for storing data in a first memory block among the plurality of memory blocks, and determines a second memory block to store dummy data based on information from the block manager when the first memory block is full by a program operation corresponding to the program command.

公开(公告)号：US11841795B2

公开(公告)日：2023-12-12

申请号：US17587088

申请日：2022-01-28

Applicant: SK hynix Inc.

Inventor： Min Jun Jang

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  G06F2212/7201

Abstract: A storage device includes: a memory device including a plurality of memory blocks; a buffer memory device including first and second buffers which temporarily store write data; and a memory controller for controlling the memory device and the buffer memory device to perform a write operation of storing the write data in the memory device. The memory controller allocates a command to a mapping table including mapping information corresponding to a physical address according to a reception order of the command, when the memory controller receives the command from a host, and controls the buffer memory device such that write data is temporarily stored in a corresponding one of the first and second buffers. When write data temporarily stored in the first or second buffer is flushed to the memory device, the memory controller updates the mapping table, using mapping information corresponding to the flushed write data.

公开(公告)号：US11630764B2

公开(公告)日：2023-04-18

申请号：US16891314

申请日：2020-06-03

Applicant: SK hynix Inc.

Inventor： Min Jun Jang ,  Hyoung Pil Choi

IPC: G06F12/02 ,  G06F12/06 ,  G06F11/30 ,  G06F13/16

Abstract: Embodiments of the present disclosure relate to a memory system, a memory controller, and a method for operating the same. Garbage collection is performed with regard to the memory device on the basis of a first amount of time and a second amount of time, the first amount of time being a period of time between triggering of first garbage collection and triggering of second garbage collection, and the second amount of time being an amount of time necessary to perform the second garbage collection. A ratio of the first amount of time to the second amount of time is determined as a target ratio value, and the second amount of time is determined to be equal to or longer than a minimum garbage collection operation time. Accordingly, efficient garbage collection can be performed, and the optimal time to perform garbage collection can be determined with regard to a configured performance drop value.