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1.
公开(公告)号:US20220309014A1
公开(公告)日:2022-09-29
申请号:US17467070
申请日:2021-09-03
Applicant: SK hynix Inc.
Inventor: Yong Tae Jeon , Ji Woon Yang , Sang Hyun Yoon , Se Hyeon Han
Abstract: Provided are a Peripheral Component Interconnect Express (PCIe) interface device and a method of operating the same. The PCIe interface device may include a performance analyzer and a traffic class controller. The performance analyzer may be configured to measure throughputs of multiple functions executed on one or more Direct Memory Access (DMA) devices. The traffic class controller may be configured to allocate traffic class values to transaction layer packets received from the multiple functions based on the throughputs of the multiple functions.
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公开(公告)号:US12292849B2
公开(公告)日:2025-05-06
申请号:US18406919
申请日:2024-01-08
Applicant: SK hynix Inc.
Inventor: Yong Tae Jeon , Byung Cheol Kang , Seung Duk Cho , Sang Hyun Yoon , Se Hyeon Han , Jae Young Jang
Abstract: A peripheral component interconnect express (PCIe) device includes a common function performing operations associated with a PCIe interface according to a function type, the common function being programmable to be a function type selected from a plurality function types, an access identification information controller generating first access identification information for allowing an access to the common function, and providing the first access identification information to an assigned system image to which the common function has been assigned, a data packet receiver receiving a data packet including target identification information indicating a target system image from the target system image, and an access allowance determiner determining whether or not to allow the target system image to access the common function based on the first access identification information and the target identification information.
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3.
公开(公告)号:US12007918B2
公开(公告)日:2024-06-11
申请号:US17467070
申请日:2021-09-03
Applicant: SK hynix Inc.
Inventor: Yong Tae Jeon , Ji Woon Yang , Sang Hyun Yoon , Se Hyeon Han
CPC classification number: G06F13/24 , G06F13/4221 , G06F2213/0026
Abstract: Provided are a Peripheral Component Interconnect Express (PCIe) interface device and a method of operating the same. The PCIe interface device may include a performance analyzer and a traffic class controller. The performance analyzer may be configured to measure throughputs of multiple functions executed on one or more Direct Memory Access (DMA) devices. The traffic class controller may be configured to allocate traffic class values to transaction layer packets received from the multiple functions based on the throughputs of the multiple functions.
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公开(公告)号:US11928070B2
公开(公告)日:2024-03-12
申请号:US17506610
申请日:2021-10-20
Applicant: SK hynix Inc.
Inventor: Yong Tae Jeon , Byung Cheol Kang , Seung Duk Cho , Sang Hyun Yoon , Se Hyeon Han , Jae Young Jang
CPC classification number: G06F13/4221 , G06F1/08 , G06F7/588 , G06F13/4045
Abstract: A peripheral component interconnect express (PCIe) device includes a common function performing operations associated with a PCIe interface according to a function type, the common function being programmable to be a function type selected from a plurality function types, an access identification information controller generating first access identification information for allowing an access to the common function, and providing the first access identification information to an assigned system image to which the common function has been assigned, a data packet receiver receiving a data packet including target identification information indicating a target system image from the target system image, and an access allowance determiner determining whether or not to allow the target system image to access the common function based on the first access identification information and the target identification information.
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公开(公告)号:US12216599B2
公开(公告)日:2025-02-04
申请号:US17567609
申请日:2022-01-03
Applicant: SK hynix Inc.
Inventor: Yong Tae Jeon , Ji Woon Yang , Sang Hyun Yoon , Se Hyeon Han
Abstract: Provided are a Peripheral Component Interconnect Express (PCIe) device and a method of operating the same. The PCIe device may include a performance analyzer, a delay time information generato and a command fetcher. The performance analyzer may measure throughputs of a plurality of functions, and generate throughput analysis information indicating a comparison result between the throughputs of the plurality of functions and throughput limits corresponding to the plurality of functions. The delay time information generator may generate a delay time for delaying a command fetch operation for each of the plurality of functions based on the throughput analysis information. The command fetcher may fetch a target command from a host based on a delay time of a function corresponding to the target command.
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