公开(公告)号：US3151256A

公开(公告)日：1964-09-29

申请号：US13236861

申请日：1961-08-18

Applicant: SPERRY RAND CORP

Inventor： SIMON WILLIAM F ,  TORREY ROBERT D

IPC: H03K3/2893

CPC classification number: H03K3/2893

公开(公告)号：US3681615A

公开(公告)日：1972-08-01

申请号：US3681615D

申请日：1971-08-09

Applicant: SPERRY RAND CORP

Inventor： RICCI VINCENT C ,  SIMON WILLIAM F

IPC: H03K19/018 ,  H03K19/088 ,  H03K19/34 ,  H03K19/40

CPC classification number: H03K19/088 ,  H03K19/01806

Abstract: A transistor-transistor-logic circuit includes an input stage transistor, a phase-splitter element, a grounded emitter element, and an active pull-up circuit, wherein the active pull-up and grounded emitter stage outputs are split to allow wire OR-ing by tying together either the emitters of like outputs of active pull-up elements, or the collectors of grounded emitter elements, or both, or normal operation by tying together emitters and collectors.

公开(公告)号：US3331051A

公开(公告)日：1967-07-11

申请号：US31264463

申请日：1963-09-30

Applicant: SPERRY RAND CORP

Inventor： SIMON WILLIAM F

IPC: G11B20/14

CPC classification number: G11B20/1419

公开(公告)号：US3188616A

公开(公告)日：1965-06-08

申请号：US13215961

申请日：1961-08-17

Applicant: SPERRY RAND CORP

Inventor： SIMON WILLIAM F

IPC: C22C28/00 ,  G11B5/09 ,  H03K17/04

CPC classification number: G11B5/09 ,  C22C28/00 ,  H03K17/04

Abstract: 996,460. Transistor switching circuits. SPERRY RAND CORPORATION. Aug. 3, 1962 [Aug. 17, 1961], No. 29861/62. Heading H3T. [Also in Division G5] A magnetic transducer shunted by a resistor is connected in series with the parallel arrangement of a capacitor and resistor having the same time constant as the transducer circuit such that the combined circuit appears as a resistor to the amplifier feeding the transducer. Fig. 1 shows a transistor amplifier circuit 28, 30 supplying pulses through a line 36 and a matching transformer 48 to a magnetic recording head 10. The head is shunted by a resistor 70 which swamps the variation with frequency of the effective resistance of the head and R.C. networks 78, 80 and 82, 84 are connected in series with the output circuit so that each half of the output circuit appears as in Fig. 2. Resistor 82 is equal to resistance 70 1 and the time constants of the circuits 50 1 , 70 1 and 82, 84 are equal so that the load on the cable and the amplifier appears as a pure resistance. A single-ended circuit may alternatively be used.

公开(公告)号：US3628095A

公开(公告)日：1971-12-14

申请号：US3628095D

申请日：1970-12-02

Applicant: SPERRY RAND CORP

Inventor： SCHWARTZ LEON ,  SIMON WILLIAM F

IPC: H05K1/02 ,  H05K3/34 ,  H05K1/04

CPC classification number: H05K1/0263 ,  H05K3/3447 ,  H05K2201/10272 ,  H05K2201/10689

Abstract: There is disclosed herein an arrangement for connecting and holding a power distribution bus to a printed circuit board. The bus incorporates flat pads which extend from and are coplanar with it. An oversized hole in each respective pad is provided so that the respective bus may be oriented over an existing plated through hole in the printed circuit board. The leads of an integrated circuit package required to be connected to the voltage or ground potential elements of the power distribution bus are positioned both through the oversized hole of the pad and the plated through hole of the printed circuit board. The connection is made permanent by soldering.