公开(公告)号：US11162839B2

公开(公告)日：2021-11-02

申请号：US17071326

申请日：2020-10-15

Applicant: STMicroelectronics (Research & Development) Limited

Inventor： Mohammed Al-Rawhani ,  Bruce Rae

IPC: G01J1/44 ,  H03K3/037

Abstract: A photodetection circuit includes a single photon avalanche diode (SPAD) having a cathode coupled to a high voltage supply through a quench resistance and an anode coupled to a first node, a capacitive deep trench isolation capacitor coupled between the first node and ground, and a first n-channel transistor. The first n-channel transistor has a drain coupled to the first node, a source coupled to ground, and a gate coupled to a resistance control signal. A second n-channel transistor has a drain coupled to the first node, a source coupled to ground, and a gate coupled to a second node. An inverter has an input coupled to the first node and an output coupled to an intermediate node. A current starved inverter has an input coupled to the intermediate node and an output coupled to the second node.

公开(公告)号：US11349042B2

公开(公告)日：2022-05-31

申请号：US16718762

申请日：2019-12-18

Applicant: STMicroelectronics (Research & Development) Limited

Inventor： Mohammed Al-Rawhani ,  Neale Dutton ,  John Kevin Moore ,  Bruce Rae ,  Elsa Lacombe

IPC: H04N5/378 ,  H01L31/107 ,  H01L27/146 ,  H01L31/02 ,  H04N5/3745

Abstract: A pixel includes a single photon avalanche diode (SPAD) having a cathode coupled to a high voltage supply through a quenching element, with the SPAD having a capacitance at its anode formed from a deep trench isolation, with the quenching element having a sufficiently high resistance such that the capacitance is not fully charged when the SPAD is struck by an incoming photon. The pixel includes a clamp transistor configured to be controlled by a voltage clamp control signal to clamp voltage at an anode of the SPAD when the SPAD is struck by an incoming photon to be no more than a threshold clamped anode voltage, and readout circuitry coupled to receive the clamped anode voltage from the clamp transistor and to generate a pixel output therefrom. The threshold clamped anode voltage is below a maximum operating voltage rating of transistors forming the readout circuitry.

公开(公告)号：US12074242B2

公开(公告)日：2024-08-27

申请号：US17734738

申请日：2022-05-02

Applicant: STMicroelectronics (Research & Development) Limited

Inventor： Mohammed Al-Rawhani ,  Neale Dutton ,  John Kevin Moore ,  Bruce Rae ,  Elisa Lacombe

IPC: H01L31/107 ,  H01L27/146 ,  H04N25/705 ,  H04N25/75

CPC classification number: H01L31/107 ,  H01L27/14612 ,  H01L27/14643 ,  H04N25/705 ,  H04N25/75

Abstract: Disclosed herein is an array of pixels. Each pixel includes a single photon avalanche diode (SPAD) and a transistor circuit. The transistor circuit includes a clamp transistor configured to clamp an anode voltage of the SPAD to be no more than a threshold clamped anode voltage, and a quenching element in series with the clamp transistor and configured to quench the anode voltage of the SPAD when the SPAD is struck by an incoming photon. Readout circuitry is coupled to receive the clamped anode voltage from the transistor circuit and to generate a pixel output therefrom, the threshold clamped anode voltage being below a maximum voltage rating of transistors forming the readout circuitry.

公开(公告)号：US11579016B2

公开(公告)日：2023-02-14

申请号：US17392422

申请日：2021-08-03

Applicant: STMicroelectronics (Research & Development) Limited

Inventor： Mohammed Al-Rawhani ,  Bruce Rae

IPC: G01J1/44

Abstract: A single photon avalanche diode (SPAD) has a cathode coupled to a high voltage supply and an anode coupled to a first node. A photodetection circuit includes: a first n-channel transistor having a drain coupled to the first node, a source coupled to ground, and a gate coupled to a third node; a second n-channel transistor having a drain coupled to the first node, a source coupled to ground, and a gate coupled to a second node; and an inverter having an input coupled to the first node and an output coupled to an intermediate node. A current starved inverter has an input coupled to the intermediate node and an output coupled to the second node, a logic gate has inputs coupled to the intermediate node and the second node, and an output coupled to the third node.

公开(公告)号：US11105679B2

公开(公告)日：2021-08-31

申请号：US16711832

申请日：2019-12-12

Applicant: STMicroelectronics (Research & Development) Limited

Inventor： Mohammed Al-Rawhani ,  Bruce Rae

IPC: H01L31/107 ,  G01J1/44

Abstract: A photodetection circuit includes a single photon avalanche diode (SPAD), and an active quenching circuit coupling the SPAD to an intermediate node and having a variable RC constant. The variable RC constant provides a first RC constant during an idle state so that when the SPAD detects a photon, the SPAD avalanches to begin quenching to set a magnitude of a voltage at a terminal of the SPAD to a quench voltage, the quench voltage being greater than a threshold voltage; a second RC constant greater than the first RC constant during a hold off period during which the quenching occurs so as to maintain the voltage at the terminal of the SPAD at a magnitude that is above the threshold voltage during the hold off period; and a third RC constant less than the second RC constant but greater than the first RC constant during a recharge period during which the SPAD is recharged.