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公开(公告)号：US11551614B2
公开(公告)日：2023-01-10
申请号：US16488520
申请日：2018-02-23
Applicant: SYNAPTICS INCORPORATED
Inventor： Damien Berget , Hirobumi Furihata , Joseph Kurth Reynolds , Takashi Nose
IPC: G09G3/20 , G09G3/3258 , G09G3/3291 , G09G3/3275 , G09G5/395
Abstract: A system and method for encoding, transmitting and updating a display based on demura calibration information for a display device comprises generating demura correction coefficients based on display color information, separating coherent components from the demura correction coefficients to generate residual information, and encode the residual information using a first encoding technique. Further, the image data may be divided into data streams, compressed and transmitted to from a host device to a display driver of a display device. The display driver decompresses and drives subpixels of the pixels in based on the decompressed data. The display driver updates the subpixels of a display using corrected greyscale values for each subpixel are determined from the decompressed data.
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公开(公告)号：US10706779B2
公开(公告)日：2020-07-07
申请号：US15594203
申请日：2017-05-12
Applicant: SYNAPTICS INCORPORATED
Inventor： Hirobumi Furihata , Damien Berget , Takashi Nose , Joseph Kurth Reynolds
IPC: G09G3/3258 , G09G3/3275 , G09G3/20 , G09G5/395 , G09G3/3291
Abstract: A display driver for driving a display panel includes a voltage data generator circuit calculating a voltage data value from an input grayscale value and a driver circuitry driving the display panel in response to the voltage data value. The voltage data generator circuit includes a basic control point data storage circuit storing therein basic control point data specifying a basic correspondence relationship between the input grayscale value and the voltage data value, a correction data memory storing correction data for each of the pixel circuits, a control point calculation circuit and a data correction circuit. When the voltage data value is calculated for a specific pixel circuit, the control point calculation circuit generates control point data associated with the specific pixel circuit by correcting the basic control point data on the basis of the correction data associated with the specific pixel circuit, and The data correction circuit calculates the voltage data value from the input grayscale value on the basis of the correspondence relationship specified by the control point data associated with the control point data.
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公开(公告)号：US09715297B2
公开(公告)日：2017-07-25
申请号：US14788562
申请日：2015-06-30
Applicant: SYNAPTICS INCORPORATED
Inventor： Damien Berget , Joseph Kurth Reynolds , Stephen L. Morein
CPC classification number: G06F3/0412 , G06F3/0416 , G06F3/044
Abstract: A display and touch driver architecture is described that includes a plurality of source drivers and a processing system. The processing system operates receivers within the source drivers to selectively receive sensing data from the receivers and determines positional information based on the sensing data. The processing system may selectively operate different source drivers in low power modes and/or for capacitive sensing based on the determined positional information.
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公开(公告)号：US11282431B2
公开(公告)日：2022-03-22
申请号：US16659257
申请日：2019-10-21
Applicant: SYNAPTICS INCORPORATED
Inventor： Damien Berget , Joseph Kurth Reynolds
Abstract: A system and method for updating a display of a display device. The display device may include a plurality of subpixels, and a display driver coupled to the plurality of subpixels. The display driver may be configured to compare a first data signal of a first statistically selected subpixel of the plurality of subpixels to a first statistically selected threshold, increase a value of a first counter corresponding to the first statistically selected subpixel in response to the first subpixel data signal exceeding the first statistically selected threshold, adjust the first subpixel data signal in response to the first counter value satisfying a second threshold, and drive the first statistically selected subpixel based at least in part on the adjusted first subpixel data signal.
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公开(公告)号：US10991304B2
公开(公告)日：2021-04-27
申请号：US16223508
申请日：2018-12-18
Applicant: SYNAPTICS INCORPORATED
Inventor： Hirobumi Furihata , Damien Berget , Takashi Nose , Joseph Kurth Reynolds
IPC: G09G3/3258 , G09G3/3291 , G09G3/20 , G09G3/3275 , G09G5/395
Abstract: A host device divides original data into first to Nth stream data for N being an integer of two or more, generates first to Nth compressed stream data by sequentially compressing the first to Nth stream data with a variable length compression, divides the first to Nth compressed stream data into fixed-length blocks, and sequentially transmits the fixed-length blocks to the display driver. The display driver includes a memory storing therein the fixed-length blocks and a decompression circuitry reading out the fixed-length blocks from the memory. The decompression circuitry includes first to Nth processing circuits. The first to Nth processing circuits each perform a predetermined process on the fixed-length blocks received to generate processed data. The host device sorts the fixed-length blocks so that the fixed-length blocks are supplied in the order in which the first to Nth processing circuits require the fixed-length blocks.
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Patent Agency Ranking
公开(公告)号：US10176761B2
公开(公告)日：2019-01-08
申请号：US15594327
申请日：2017-05-12
Applicant: SYNAPTICS INCORPORATED
Inventor： Hirobumi Furihata , Damien Berget , Takashi Nose , Joseph Kurth Reynolds
IPC: G09G5/395 , G09G3/3258 , G09G3/3291
Abstract: A host device divides original data into first to Nth stream data for N being an integer of two or more, generates first to Nth compressed stream data by sequentially compressing the first to Nth stream data with a variable length compression, divides the first to Nth compressed stream data into fixed-length blocks, and sequentially transmits the fixed-length blocks to the display driver. The display driver includes a memory storing therein the fixed-length blocks and a decompression circuitry reading out the fixed-length blocks from the memory. The decompression circuitry includes first to Nth processing circuits. The first to Nth processing circuits each perform a predetermined process on the fixed-length blocks received to generate processed data. The host device sorts the fixed-length blocks so that the fixed-length blocks are supplied in the order in which the first to Nth processing circuits require the fixed-length blocks.
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公开(公告)号：US10025428B2
公开(公告)日：2018-07-17
申请号：US14946746
申请日：2015-11-19
Applicant: SYNAPTICS INCORPORATED
Inventor： Kasra Khazeni , Damien Berget , Joseph Kurth Reynolds
CPC classification number: G06F3/0418 , G06F3/044 , G06F2203/04104 , G06F2203/04106
Abstract: Embodiments of the disclosure provided herein provide a device and method of using the device that is able to improve the detection of user input provided to an input device while one or more sources of noise are present during the detection process. One or more of the embodiments disclosed herein may include a scanning process and a signal processing technique that is able to more reliably detect the presence and position of an input object by reducing the effect of noise on a resulting signal that is generated during a capacitive sensing process. In some configurations, the scanning and signal processing techniques disclosed herein can be improved by increasing a capacitive sensing device's ability to detect the presence of an input object by improving the signal-to-noise ratio of the data collected during a capacitive sensing process.
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公开(公告)号：US09720541B2
公开(公告)日：2017-08-01
申请号：US14788596
申请日：2015-06-30
Applicant: SYNAPTICS INCORPORATED
Inventor： Damien Berget , Joseph Kurth Reynolds , Stephen L. Morein
CPC classification number: G06F3/0416 , G06F3/0412 , G06F3/044
Abstract: The disclosure generally describes input devices with associated processing system configured to perform display updating and capacitive sensing. The processing system includes first and second pluralities of display driver pads coupled with a plurality of source lines, and a plurality of sensor pads disposed between the first and second pluralities of display driver pads and coupled with a plurality of sensor electrodes through a plurality of conductive routing traces. The plurality of sensor electrodes includes at least one common electrode of a display device, the common electrode configured to be driven for display updating and capacitive sensing. The processing system is configured to drive the plurality of source lines for display updating, and to drive the plurality of sensor electrodes for capacitive sensing.
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公开(公告)号：US11159150B2
公开(公告)日：2021-10-26
申请号：US16869518
申请日：2020-05-07
Applicant: SYNAPTICS INCORPORATED
Inventor： Jeremy Roberson , David Sobel , Damien Berget
Abstract: Embodiments disclosed herein generally relate to electronic devices, and more specifically, to a waveform generation circuit for input devices. One or more embodiments provide a new waveform generator for an integrated touch and display driver (TDDI) and methods for generating a waveform for capacitive sensing with a finely tunable sensing frequency. A waveform generator includes accumulator circuitry, truncation circuitry, and saturation circuitry. The accumulator circuitry is configured to accumulate the phase increment value based on a clock signal, and output the accumulated phase increment value. The truncation circuitry configured to drop one or more bits of the accumulated phase increment value to output a truncated value. The saturation circuitry is configured to compare the truncated value to a saturation limit and output a signal corresponding to accessed data samples.
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公开(公告)号：US10686432B2
公开(公告)日：2020-06-16
申请号：US16201600
申请日：2018-11-27
Applicant: SYNAPTICS INCORPORATED
Inventor： Jeremy Roberson , David Sobel , Damien Berget
Abstract: Embodiments disclosed herein generally relate to electronic devices, and more specifically, to a waveform generation circuit for input devices. One or more embodiments provide a new waveform generator for an integrated touch and display driver (TDDI) and methods for generating a waveform for capacitive sensing with a finely tunable sensing frequency. A waveform generator includes accumulator circuitry, truncation circuitry, and saturation circuitry. The accumulator circuitry is configured to accumulate the phase increment value based on a clock signal, and output the accumulated phase increment value. The truncation circuitry configured to drop one or more bits of the accumulated phase increment value to output a truncated value. The saturation circuitry is configured to compare the truncated value to a saturation limit and output a signal corresponding to accessed data samples.
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