ENHANCING SLEEP QUALITY
    2.
    发明公开

    公开(公告)号:US20240165370A1

    公开(公告)日:2024-05-23

    申请号:US18490657

    申请日:2023-10-19

    Abstract: An apparatus for monitoring sleep quality includes a plurality of sensors, a plurality of actuator modules, a transceiver, and a processor operatively coupled with the plurality of sensor modules, the plurality of actuator modules, and the transceiver. The processor is configured to monitor a sleep session of a user utilizing the apparatus. To monitor the sleep session, the processor is further configured to monitor a sleep state of the user, monitor a sleep stage of the user, and monitor a sleep condition. The processor is further configured to select a sleep facilitating action, control the sleep facilitating action based on the monitoring, and collect data related to the sleep session, and update a sleep history database associated with the user based on the data related to the sleep session.

    SLEEP MANAGEMENT SYSTEM AND SLEEP MANAGEMENT METHOD

    公开(公告)号:US20250099029A1

    公开(公告)日:2025-03-27

    申请号:US18887842

    申请日:2024-09-17

    Abstract: Provided is a sleep management system, including a plurality of sensors including a first sensor and a second sensor being configured to collect data of a user, a hub device configured to receive first data collected by the first sensor and second data collected by the second sensor, obtain first processed data based on processing of the first data and second processed data based on processing of the second data, and a user device configured to receive the first processed data and the second processed data, obtain sleep state information corresponding to a sleep stage and a body movement of the user based on the first processed data and the second processed data, determine whether a non-rapid eye movement (NREM) sleep behavior disorder of the user occurs based on the user's sleep stage and the user's body movement, and perform a preset operation based on an occurrence of the NREM.

    Memory device including vertical stack structure and method of manufacturing the same

    公开(公告)号:US11682717B2

    公开(公告)日:2023-06-20

    申请号:US17459527

    申请日:2021-08-27

    CPC classification number: H01L29/685 H01L27/115

    Abstract: Disclosed are a memory device including a vertical stack structure and a method of manufacturing the memory device. The memory device includes an insulating structure having a shape including a first surface and a protrusion portion protruding in a first direction from the first surface, a recording material layer covering the protrusion portion along a protruding shape of the protrusion portion and extending to the first surface on the insulating structure a channel layer on the recording material layer along a surface of the recording material layer, a gate insulating layer on the channel layer, and a gate electrode formed at a location on the gate insulating layer to face a second surface which is a protruding upper surface of the protrusion portion, wherein a void exists between the gate electrode and the insulating structure, defined by the insulating structure and the recording material layer.

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