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公开(公告)号:US11329137B2
公开(公告)日:2022-05-10
申请号:US16927463
申请日:2020-07-13
Applicant: Samsung Electronics Co., Ltd.
Inventor: Naoto Umezawa , Satoru Yamada , Junsoo Kim , Honglae Park , Chunhyung Chung
IPC: H01L29/51 , H01L27/108 , H01L29/423 , H01L29/49
Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a substrate; an isolation layer in a first trench, defining an active region of the substrate; a gate structure in a second trench intersecting the active region; and first and second impurity regions spaced apart from each other by the gate structure. The gate structure includes a gate dielectric layer in the second trench; a first metal layer on the gate dielectric layer; and a gate capping layer on the first metal layer. The gate dielectric layer includes D+ and ND2+ in an interface region, adjacent the first metal layer, and D is deuterium, N is nitrogen, and D+ is positively-charged deuterium.
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公开(公告)号:US20220223713A1
公开(公告)日:2022-07-14
申请号:US17702856
申请日:2022-03-24
Applicant: Samsung Electronics Co., Ltd.
Inventor: Naoto Umezawa , Satoru Yamada , Junsoo Kim , Honglae Park , Chunhyung Chung
IPC: H01L29/51 , H01L27/108 , H01L29/423 , H01L29/49
Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a substrate; an isolation layer in a first trench, defining an active region of the substrate; a gate structure in a second trench intersecting the active region; and first and second impurity regions spaced apart from each other by the gate structure. The gate structure includes a gate dielectric layer in the second trench; a first metal layer on the gate dielectric layer; and a gate capping layer on the first metal layer. The gate dielectric layer includes D+ and ND2+ in an interface region, adjacent the first metal layer, and D is deuterium, N is nitrogen, and D+ is positively-charged deuterium.
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公开(公告)号:US20210134975A1
公开(公告)日:2021-05-06
申请号:US16927463
申请日:2020-07-13
Applicant: Samsung Electronics Co., Ltd.
Inventor: Naoto Umezawa , Satoru Yamada , Junsoo Kim , Honglae Park , Chunhyung Chung
IPC: H01L29/51 , H01L29/49 , H01L29/423 , H01L27/108
Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a substrate; an isolation layer in a first trench, defining an active region of the substrate; a gate structure in a second trench intersecting the active region; and first and second impurity regions spaced apart from each other by the gate structure. The gate structure includes a gate dielectric layer in the second trench; a first metal layer on the gate dielectric layer; and a gate capping layer on the first metal layer. The gate dielectric layer includes D+ and ND2+ in an interface region, adjacent the first metal layer, and D is deuterium, N is nitrogen, and D+ is positively-charged deuterium.
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公开(公告)号:US10347684B2
公开(公告)日:2019-07-09
申请号:US15848733
申请日:2017-12-20
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Honglae Park , Jaeho Kim , Hyoshin Ahn , Inkook Jang
IPC: H01L31/18 , H01L27/146 , H01L31/0248 , H04N5/361
Abstract: An image sensor includes a substrate including a photoelectric conversion part therein, and a fixed charge layer provided above the substrate. The fixed charge layer includes a first metal oxide and a second metal oxide, which are different from each other. The first metal oxide includes a first metal, and the second metal oxide includes a second metal different from the first metal. Concentration of the first metal in the fixed charge layer progressively increases from an upper portion of the fixed charge layer to a lower portion of the fixed charge layer.
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