公开(公告)号：US20250144869A1

公开(公告)日：2025-05-08

申请号：US19018866

申请日：2025-01-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kiwoong KIM ,  Seunggoo HWANG ,  Jong In DO ,  Ook Jin LEE

IPC: B29C63/00 ,  B29C63/02

Abstract: An apparatus configured to attach a protective film to a surface of an electronic device includes a fixing tray including a seating portion at which the electronic device is seated, a base to which the fixing tray is coupled, the base including a rail extending in a first direction, and a roller module configured to move along the rail in the first direction, the roller module including a roller configured to press the surface of the electronic device seated in the fixing tray, where the fixing tray includes a first fixing guide protruding from the fixing tray in the first direction from the seating portion and configured to support a first end of the protective film, and a second fixing guide protruding from the fixing tray in a second direction that is opposite to the first direction and configured to support a second end of the protective film.

公开(公告)号：US20250127061A1

公开(公告)日：2025-04-17

申请号：US18637849

申请日：2024-04-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwangseok KIM ,  Kiwoong KIM ,  Seonggeon PARK

IPC: H10N50/10 ,  G11C11/16 ,  H01F10/32 ,  H10B61/00 ,  H10N50/85

Abstract: A magnetic tunnel junction device and a memory device including the magnetic tunnel junction device are provided. The magnetic tunnel junction device includes a seed layer, a pinned layer on the seed layer, a free layer facing the pinned layer, and a tunnel barrier layer between the pinned layer and the free layer, wherein the seed layer includes a first seed layer and a second seed layer between the first seed layer and the pinned layer, and one of the first seed layer and the second seed layer includes rhenium (Re) and the other of the first seed layer and the second seed layer includes ruthenium (Ru).

公开(公告)号：US20240023253A1

公开(公告)日：2024-01-18

申请号：US18144592

申请日：2023-05-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yoonah KIM ,  Kiwoong KIM ,  Dowan KIM ,  Chiun PARK ,  Kwangsung HWANG

IPC: H05K5/00 ,  H05K5/02 ,  H01L25/075

CPC classification number: H05K5/0021 ,  H05K5/0217 ,  H05K5/0214 ,  H01L25/0753

Abstract: A display apparatus includes: a display module including a substrate on which a plurality of light emitting diodes (LEDs) are mounted, a holder covering a rear side of the substrate, a reinforcement member provided on a rear side of the holder, and a fixing member protruding rearward from the holder; a cabinet provided to support the display module and including a plurality of first magnets and a through hole through which the fixing member passes; and a circuit case including a plurality of second magnets and coupled to the cabinet. The display module is coupled to the cabinet by a first magnetic attraction between the plurality of first magnets and the reinforcement member and a second magnetic attraction between the plurality of second magnets and the reinforcement member.

公开(公告)号：US20180226575A1

公开(公告)日：2018-08-09

申请号：US15943698

申请日：2018-04-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Juhyun KIM ,  Kiwoong KIM ,  Sechung OH ,  Woochang LIM

IPC: H01L43/12 ,  H01L43/08

CPC classification number: H01L43/12 ,  H01L43/08

Abstract: A semiconductor device and a method of forming the semiconductor device are disclosed. The semiconductor device includes a lower electrode and a magnetic tunnel junction structure disposed on the lower electrode. The magnetic tunnel junction structure includes a seed pattern disposed on the lower electrode. The seed pattern includes an amorphous seed layer and an oxidized seed layer disposed on a surface of the amorphous seed layer. The seed pattern may prevent the lattice structure of the lower electrode from adversely affecting the lattice structure of a pinned magnetic layer of the magnetic tunnel junction structure.

公开(公告)号：US20230225220A1

公开(公告)日：2023-07-13

申请号：US17983796

申请日：2022-11-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwangseok KIM ,  Kiwoong KIM ,  Jeongchun RYU ,  Seonggeon PARK

IPC: H01L43/08 ,  H01L43/10 ,  G01R33/09 ,  H01L27/22 ,  H01L43/12 ,  H01F10/32 ,  H01L43/02 ,  G11C11/16

CPC classification number: H01L43/08 ,  H01L43/10 ,  G01R33/098 ,  H01L27/222 ,  H01L43/12 ,  H01F10/3272 ,  H01L43/02 ,  G11C11/161

Abstract: Provided are a magnetic tunneling junction device having a relatively high tunneling magnetoresistance (TMR) ratio; and a memory device including the magnetic tunneling junction device. The magnetic tunneling junction device includes: a pinned layer having a first surface and a second surface opposite the first surface; a seed layer disposed in contact with the first surface of the pinned layer; a free layer disposed to face the second surface of the pinned layer; and a tunnel barrier layer disposed between the pinned layer and the free layer, wherein the seed layer includes at least one amorphous material selected from CoFeX and CoFeXTa, and the X includes at least one element selected from niobium (Nb), molybdenum (Mo), tungsten (W), chromium (Cr), zirconium (Zr), and hafnium (Hf). The seed layer may not include boron.

公开(公告)号：US20220406812A1

公开(公告)日：2022-12-22

申请号：US17689280

申请日：2022-03-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junsuk KIM ,  Donghoon KWON ,  Kiwoong KIM ,  Chungki MIN ,  Youngbeom PYON ,  Changsun HWANG

IPC: H01L27/11582 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157 ,  H01L23/522 ,  H01L23/528

Abstract: A semiconductor device includes a substrate; a first stack structure including first gate electrodes on the substrate; and a second stack structure on the first stack structure; wherein the first stack structure includes a first lower staircase region, a second lower staircase region, and a third lower staircase region, wherein the second stack structure includes a first upper staircase region, a second upper staircase region, a third upper staircase region, and at least one through portion penetrating the second stack structure and on the first to third lower staircase regions, wherein the first lower staircase region has a same shape as a shape of the first upper staircase region, the second lower staircase region has a same shape as a shape of the second upper staircase region, and the third lower staircase region has a same shape as a shape of the third upper staircase region.

公开(公告)号：US20140356563A1

公开(公告)日：2014-12-04

申请号：US14280900

申请日：2014-05-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyungmo YANG ,  Kiwoong KIM ,  Kwangsu SEO ,  Sungjae LEE ,  Yongwoo JEON ,  Wonhee CHOI ,  Byounguk YOON

IPC: H05K5/03 ,  B29C35/08 ,  B29C45/16

CPC classification number: G03F7/0002 ,  B29C35/0805 ,  B29C37/0053 ,  B29C43/021 ,  B29C43/18 ,  B29C45/1679 ,  B29C2035/0827 ,  B29C2037/0035 ,  B29C2037/0042 ,  G03F7/20 ,  H04M1/0283 ,  H05K5/03 ,  Y10T428/13 ,  Y10T428/1352

Abstract: A surface treatment method of an electronic device is provided. The surface treatment method includes processing a first pattern on a surface of a top mold and a second pattern on a surface of a bottom mold, coating a Ultra-Violet (UV) molding liquid on each of a front surface of a raw sheet material and the bottom mold facing a rear surface of the raw sheet material raw, positioning the raw sheet material between the top mold and the bottom mold, pressing the top mold and the bottom mold to each other, curing the UV molding liquid, and separating the raw sheet material from the top mold and the bottom mold and forming a print layer on the front surface and the rear surface of the raw sheet material.

Abstract translation: 提供电子设备的表面处理方法。 表面处理方法包括在上模的表面上加工第一图案，在底模的表面上加工第二图案，在原纸片的前表面上涂覆超紫（UV）成型液， 底部模具面对原料片材的后表面，将原料片材定位在顶模和底模之间，将顶模和底模相互压合，固化UV成型液，并分离原料 从顶模和底模获得片材，并在原料片的前表面和后表面上形成印刷层。

公开(公告)号：US20250168995A1

公开(公告)日：2025-05-22

申请号：US19033320

申请日：2025-01-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dowan KIM ,  Kiwoong KIM ,  Yoonah Kim ,  Chiun PARK ,  Kwangsung HWANG

IPC: H05K5/02 ,  H05K5/30

Abstract: Disclosed is a display apparatus including a display module including a substrate on which a plurality of light-emitting diodes (LEDs) are mounted, a cabinet configured to support the display module, and a circuit case coupled to the cabinet, the circuit case including electrical components. The display module includes a connector electrically connecting the display module and the electrical components; a waterproof rib configured to surround the connector and spaced from the connector; a sealing member configured to surround the connector and to seal between the display module and the circuit case in response to the display module being coupled to the circuit case; and a drainage hole formed on a lower portion of the waterproof rib.

公开(公告)号：US20240032217A1

公开(公告)日：2024-01-25

申请号：US18143933

申请日：2023-05-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dowan KIM ,  Kiwoong KIM ,  Yoonah KIM ,  Chiun PARK ,  Kwangsung HWANG

IPC: H05K5/02 ,  H05K5/00 ,  H01L25/075

CPC classification number: H05K5/0217 ,  H05K5/0021 ,  H01L25/0753

Abstract: A display apparatus includes: a display module including a substrate on which a plurality of light emitting diodes (LEDs) are mounted; a cabinet provided to support the display module; and a circuit case attached to the cabinet. The display module is provided to be detachable from and mountable on a front side of the cabinet, and the display module is provided to be detachable from and mountable on a rear side of the cabinet.

公开(公告)号：US20230225219A1

公开(公告)日：2023-07-13

申请号：US17847103

申请日：2022-06-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwangseok KIM ,  Kiwoong KIM ,  Jeongchun RYU ,  Seonggeon PARK

IPC: H01L43/08 ,  H01L43/10 ,  G11C11/16 ,  H01L27/22 ,  H01F10/32 ,  H01L43/12 ,  G01R33/09 ,  H01L43/02

CPC classification number: H01L43/08 ,  H01L43/10 ,  G11C11/161 ,  H01L27/222 ,  H01F10/3272 ,  H01L43/12 ,  G01R33/098 ,  H01L43/02

Abstract: Provided are a magnetic tunneling junction device having a relatively high tunneling magnetoresistance (TMR) ratio; and a memory device including the magnetic tunneling junction device. The magnetic tunneling junction device includes: a pinned layer having a first surface and a second surface opposite the first surface; a seed layer disposed in contact with the first surface of the pinned layer; a free layer disposed to face the second surface of the pinned layer; and a tunnel barrier layer disposed between the pinned layer and the free layer, wherein the seed layer includes at least one amorphous material selected from CoFeX and CoFeXTa, and the X includes at least one element selected from niobium (Nb), molybdenum (Mo), tungsten (W), chromium (Cr), zirconium (Zr), and hafnium (Hf). The seed layer may not include boron.