-
1.发明授权公开(公告)号：US12183783B2
公开(公告)日：2024-12-31
申请号：US17882169
申请日：2022-08-05
Applicant: Samsung Electronics Co., Ltd.
Inventor： Alum Jung , Kyung-Eun Byun , Keunwook Shin
Abstract: A stacked structure may include a first material layer, a two-dimensional material layer on the first material layer, and a second material layer on the two-dimensional material layer. The two-dimensional material layer may include a plurality of holes that each expose a portion of the first material layer. The second material layer may be coupled to the first material layer through the plurality of holes.
-
公开(公告)号：US11887849B2
公开(公告)日：2024-01-30
申请号：US17012661
申请日：2020-09-04
Inventor： Changhyun Kim , Sangwoo Kim , Kyung-Eun Byun , Hyeonjin Shin , Ahrum Sohn , Jaehwan Jung
CPC classification number: H01L21/02631 , C23C14/06 , C23C14/34 , C23C14/5806 , H01L21/02667 , H01L29/66969 , H01L21/02568 , H01L21/02592 , H01L21/02595
Abstract: Disclosed herein are a method of forming a transition metal dichalcogenide thin film and a method of manufacturing a device including the same. The method of forming a transition metal dichalcogenide thin film includes: depositing a transition metal dichalcogenide thin film on a substrate; and heat-treating the deposited transition metal dichalcogenide thin film.
-
公开(公告)号：US11713248B2
公开(公告)日：2023-08-01
申请号：US17138194
申请日：2020-12-30
Applicant: Samsung Electronics Co., Ltd.
Inventor： Changseok Lee , Changhyun Kim , Kyung-Eun Byun , Keunwook Shin , Hyeonjin Shin , Eunkyu Lee
IPC: C23C16/26 , C01B32/186 , C01B32/194 , C23C16/513 , C23C16/04 , C23C16/02
CPC classification number: C01B32/186 , C01B32/194 , C23C16/02 , C23C16/04 , C23C16/26 , C23C16/513
Abstract: A method of selectively growing graphene includes forming an ion implantation region and an ion non-implantation region by implanting ions locally into a substrate; and selectively growing graphene in the ion implantation region or the ion non-implantation region.
-
公开(公告)号：US11626502B2
公开(公告)日：2023-04-11
申请号：US17398363
申请日：2021-08-10
Applicant: Samsung Electronics Co., Ltd.
Inventor： Hyeonjin Shin , Sangwon Kim , Kyung-Eun Byun , Hyunjae Song , Keunwook Shin , Eunkyu Lee , Changseok Lee , Yeonchoo Cho , Taejin Choi
IPC: H01L29/45 , H01L29/40 , H01L29/15 , H01L27/108
Abstract: An interconnect structure for reducing a contact resistance, an electronic device including the same, and a method of manufacturing the interconnect structure are provided. The interconnect structure includes a semiconductor layer including a first region having a doping concentration greater than a doping concentration of a peripheral region of the semiconductor layer, a metal layer facing the semiconductor layer, a graphene layer between the semiconductor layer and the metal layer, and a conductive metal oxide layer between the graphene layer and the semiconductor and covering the first region.
-
公开(公告)号：US11476117B2
公开(公告)日：2022-10-18
申请号：US16928560
申请日：2020-07-14
Inventor： Kyung-Eun Byun , Hyoungsub Kim , Taejin Park , Hoijoon Kim , Hyeonjin Shin , Wonsik Ahn , Mirine Leem , Yeonchoo Cho
IPC: H01L21/02
Abstract: A method of forming a transition metal dichalcogenide thin film on a substrate includes treating the substrate with a metal organic material and providing a transition metal precursor and a chalcogen precursor around the substrate to synthesize transition metal dichalcogenide on the substrate. The transition metal precursor may include a transition metal element and the chalcogen precursor may include a chalcogen element.
-
Patent Agency Ranking
公开(公告)号：US11424186B2
公开(公告)日：2022-08-23
申请号：US17082530
申请日：2020-10-28
Applicant: Samsung Electronics Co., Ltd. , UNIST (ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)
Inventor： Hyeonjin Shin , Minhyun Lee , Changseok Lee , Kyung-Eun Byun , Hyeonsuk Shin , Seokmo Hong
IPC: H01L23/532 , H01L23/522 , H01L27/108
Abstract: A semiconductor memory device and a device including the same are provided. The semiconductor memory device includes word lines extending in a first direction on a semiconductor substrate; bit line structures extending across the word lines in a second direction crossing the first direction; contact pad structures between the word lines and between the bit line structures; and spacers between the bit line structures and the contact pad structures. The spacers include a boron nitride layer.
-
公开(公告)号：US12297532B2
公开(公告)日：2025-05-13
申请号：US18332638
申请日：2023-06-09
Inventor： Kyung-Eun Byun , Hyoungsub Kim , Taejin Park , Hyeonjin Shin , Hoijoon Kim , Wonsik Ahn , Mirine Leem
IPC: C23C16/30 , B22F7/00 , C23C16/448 , C23C16/455 , C23C16/46 , H01L21/02 , H01L21/285 , H01L31/032
Abstract: Provided are a metal chalcogenide thin film and a method and device for manufacturing the same. The metal chalcogenide thin film includes a transition metal element and a chalcogen element, and at least one of the transition metal element and the chalcogen element having a composition gradient along the surface of the metal chalcogenide thin film, the composition gradient being an in-plane composition gradient. The metal chalcogenide thin film may be prepared by using a manufacturing method including providing a transition metal precursor and a chalcogen precursor on a substrate by using a confined reaction space in such a manner that at least one of the transition metal precursor and the chalcogen precursor forms a concentration gradient according to a position on the surface of the substrate; and heat-treating the substrate.
-
公开(公告)号：US12217958B2
公开(公告)日：2025-02-04
申请号：US16807702
申请日：2020-03-03
Applicant: Samsung Electronics Co., Ltd.
Inventor： Keunwook Shin , Janghee Lee , Seunggeol Nam , Hyeonjin Shin , Hyunseok Lim , Alum Jung , Kyung-Eun Byun , Jeonil Lee , Yeonchoo Cho
Abstract: A method of pre-treating a substrate on which graphene will be directly formed may include pre-treating the substrate using a pre-treatment gas including at least a carbon source and hydrogen.
-
公开(公告)号：US12080595B2
公开(公告)日：2024-09-03
申请号：US17411467
申请日：2021-08-25
Applicant: Samsung Electronics Co., Ltd.
Inventor： Keunwook Shin , Sanghoon Ahn , Woojin Lee , Kyung-Eun Byun , Junghoo Shin , Hyeonjin Shin , Yunseong Lee
IPC: H01L21/768 , H01L21/285
CPC classification number: H01L21/7685 , H01L21/76843 , H01L21/76849 , H01L21/76855 , H01L21/28562
Abstract: Provided is a method of forming an interconnect structure. The method includes preparing a substrate including a first metal layer and a first insulating layer, selectively forming a carbon layer having an sp2 bonding structure on the first metal layer, selectively forming a second insulating layer on the first insulating layer, forming a third insulating layer to cover the second insulating layer, and forming a second metal layer electrically connected to the first metal layer.
-
公开(公告)号：US11975971B2
公开(公告)日：2024-05-07
申请号：US17190852
申请日：2021-03-03
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sangwon Kim , Kyung-Eun Byun , Hyeonjin Shin , Eunkyu Lee , Changseok Lee
IPC: B32B9/00 , C01B32/186 , B82Y30/00
CPC classification number: C01B32/186 , B82Y30/00 , Y10T428/30
Abstract: A graphene manufacturing apparatus includes a reaction chamber a substrate supporter configured to structurally support a substrate inside the reaction chamber; a plasma generator configured to generate a plasma inside the reaction chamber; a first gas supply configured to supply an inert gas into the reaction chamber at a first height from an upper surface of the substrate supporter in a height direction of the reaction chamber; a second gas supply configured to supply a carbon source into the reaction chamber at a second height from the upper surface of the substrate supporter in the height direction of the reaction chamber; and a third gas supply configured to supply a reducing gas into the reaction chamber, wherein the first to third gas supply units are disposed at different heights at a third height from the upper surface of the substrate supporter in the height direction of the reaction chamber.
-
-
-
-
-
-
-
-
-
Search Results
43
records
(took 0.02 seconds)
