公开(公告)号：US11355497B2

公开(公告)日：2022-06-07

申请号：US17077257

申请日：2020-10-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yoonho Son ,  Suklae Kim ,  Sejin Park ,  Seungjoong Shin ,  Hyuewon Lee

IPC: H01L27/108 ,  H01L49/02

Abstract: A semiconductor device includes a memory cell storing data. The memory cell capacitor includes a plurality of bottom electrodes on a substrate and extending in a vertical direction with respect to a top surface of the substrate, the plurality of bottom electrodes being spaced apart from each other in a first direction parallel to the top surface of the substrate, an upper support pattern on upper lateral surfaces of the plurality of bottom electrodes, and a lower support pattern on lower lateral surfaces of the plurality of bottom electrodes. The lower support pattern is disposed between the substrate and the upper support pattern, and a first bottom electrode of the plurality of bottom electrodes includes a first recess adjacent to a bottom surface of the lower support pattern.

公开(公告)号：US20250169066A1

公开(公告)日：2025-05-22

申请号：US18826334

申请日：2024-09-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daesun Kim ,  Suklae Kim ,  Cheonbae Kim ,  Youngseok Park ,  Taejin Park ,  Hyunchul Yoon ,  Hyeonkyu Lee ,  Sungsoo Yim ,  Hyungeun Choi

IPC: H10B12/00 ,  G11C11/408 ,  G11C11/4091 ,  H01L23/00 ,  H01L25/065 ,  H01L25/18

Abstract: Provided is a semiconductor device. The semiconductor device includes: a first connection region, a first memory block region, and a second connection region sequentially arranged; a first peripheral circuit region vertically overlapping with the first memory block region; first memory cells in the first memory block region; a first word line extending into the first and second connection regions by crossing the first memory block region, and electrically connected to the first memory cells; a first sub-word line driver in the first peripheral circuit region; and a first word line signal path electrically connecting the first word line and the first sub-word line driver. The first word line signal path includes at least one first routing contact coupled to the first word line in the first connection region, and at least one second routing contact coupled to the first word line in the second connection region.

公开(公告)号：US08939784B2

公开(公告)日：2015-01-27

申请号：US13829081

申请日：2013-03-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangki Lee ,  Insik Kim ,  Teaseog Um ,  Suklae Kim ,  Yoonoh Han

IPC: H01R13/62 ,  H01R12/50 ,  G01R1/04

CPC classification number: H01R23/70 ,  G01R1/0466 ,  G01R1/0483

Abstract: A semiconductor chip package test socket may include a socket housing; a plurality of probe needles in the socket housing; a conductive pad on the probe needles; a floating guide configured to cover an edge of the conductive pad and configured to provide a semiconductor chip package on the conductive pad; and/or clamps fixed at the socket housing. The clamps may combine the floating guide with the socket housing.

Abstract translation: 半导体芯片封装测试插座可以包括插座壳体; 插座壳体中的多个探针; 探针上的导电垫; 浮动引导件，其构造成覆盖所述导电焊盘的边缘并且被配置为在所述导电焊盘上提供半导体芯片封装; 和/或固定在插座壳体上的夹具。 夹具可以将浮动导向件与插座壳体组合。

公开(公告)号：US20250167107A1

公开(公告)日：2025-05-22

申请号：US18775049

申请日：2024-07-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyungeun Choi ,  Taejin Park ,  Suklae Kim ,  Cheonbae Kim ,  Sungsoo Yim ,  Yoona Jang ,  Hyunyong Jeong

IPC: H01L23/522 ,  G11C5/06 ,  H01L23/528 ,  H10B12/00

Abstract: A semiconductor device is provided. The semiconductor device includes a first structure having a memory block region and an extension region; and a second structure having a peripheral circuit region. The first structure includes memory cells and a word line. The second structure includes a semiconductor body; a through-insulating pattern in the semiconductor body; and a peripheral transistor. The first and second structures include a word line signal path electrically connecting the word line to the peripheral transistor. The word line signal path includes a word line contact that is in contact with the word line in the extension region; a word line routing lower structure electrically connected to the word line contact and extending from the extension region into the memory block region; and a word line routing connection structure electrically connecting the word line routing lower structure to the word line routing peripheral structure.

公开(公告)号：US11616118B2

公开(公告)日：2023-03-28

申请号：US16938286

申请日：2020-07-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seungjin Kim ,  Sungsoo Yim ,  Suklae Kim ,  Hyukwoo Kwon ,  Byunghyun Lee ,  Yoonyoung Choi

IPC: H01L49/02 ,  H01L27/108

Abstract: An integrated circuit semiconductor device includes a plurality of cylindrical structures separated from each other on a substrate; and a plurality of supporters having an opening region exposing side surfaces of the plurality of cylindrical structures, the plurality of supporters being in contact with the side surfaces of the plurality of cylindrical structures and supporting the plurality of cylindrical structures, wherein each of the plurality of supporters has both side surfaces having slopes and has a top width that is less than a bottom width.