公开(公告)号：US20240250097A1

公开(公告)日：2024-07-25

申请号：US18438633

申请日：2024-02-12

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuki OKAMOTO ,  Yoshiyuki KUROKAWA ,  Hiroki INOUE ,  Takuro OHMARU

IPC: H01L27/146 ,  H01L21/8234 ,  H01L23/528 ,  H01L27/088 ,  H01L27/12 ,  H01L29/786 ,  H01L31/075 ,  H04N23/54

CPC classification number: H01L27/14603 ,  H01L21/8234 ,  H01L27/088 ,  H01L27/1225 ,  H01L27/1255 ,  H01L27/146 ,  H01L27/14609 ,  H01L27/1461 ,  H01L27/14612 ,  H01L27/14616 ,  H01L27/1463 ,  H01L27/14643 ,  H01L27/14692 ,  H01L29/7869 ,  H01L31/075 ,  H04N23/54 ,  H01L23/5286

Abstract: A solid-state imaging device with high productivity and improved dynamic range is provided. In the imaging device including a photoelectric conversion element having an i-type semiconductor layer, functional elements, and a wiring, an area where the functional elements and the wiring overlap with the i-type semiconductor in a plane view is preferably less than or equal to 35%, further preferably less than or equal to 15%, and still further preferably less than or equal to 10% of the area of the i-type semiconductor in a plane view. Plural photoelectric conversion elements are provided in the same semiconductor layer, whereby a process for separating the respective photoelectric conversion elements can be reduced. The respective i-type semiconductor layers in the plural photoelectric conversion elements are separated by a p-type semiconductor layer or an n-type semiconductor layer.

公开(公告)号：US20240006674A1

公开(公告)日：2024-01-04

申请号：US18265116

申请日：2021-12-02

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Takeshi OSADA ,  Takayuki IKEDA ,  Yosuke TSUKAMOTO ,  Hiroki INOUE ,  Kiyotaka KIMURA ,  Shunsuke SATO ,  Toshiki MIZUGUCHI

IPC: H01M10/48 ,  H01M10/42 ,  G01R31/367

CPC classification number: H01M10/48 ,  H01M10/425 ,  G01R31/367 ,  H01M2010/4278

Abstract: A sensor capable of detecting local expansion or the like is provided, and a storage battery system including a safety system such as the sensor and a secondary battery is provided. The storage battery system includes a first secondary battery and a second secondary battery each including an exterior body holding an electrolyte solution, a positive electrode, and a negative electrode; a sensor member provided to be in contact with part of the exterior body; and a detection circuit controlling the sensor member. The first secondary battery includes a memory unit storing data collected with gas introduction into the second secondary battery, a learning model constructed on the basis of the data, and an estimated value obtained using the learning model; and a unit providing information based on the estimated value.

公开(公告)号：US20230144505A1

公开(公告)日：2023-05-11

申请号：US17795260

申请日：2021-02-03

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yusuke NEGORO ,  Seiichi YONEDA ,  Hiroki INOUE ,  Shunsuke SATO ,  Shunpei YAMAZAKI

IPC: H10K30/81 ,  H10K30/30

CPC classification number: H10K30/81 ,  H10K30/353 ,  H10K30/60

Abstract: A multifunctional imaging device is provided. The imaging device includes first to fourth light-receiving elements and first and second functional layers. The first to fourth light-receiving elements are photoelectric conversion elements having sensitivity to light of different wavelengths from each other. The first and second functional layers each include first and second transistors. The first functional layer and the fourth to first light-receiving elements are stacked in this order over the second functional layer. In each of the first to fourth light-receiving elements, a first conductive layer, a first buffer layer, a photoelectric conversion layer, a second buffer layer, and a second conductive layer are stacked in this order. The photoelectric conversion layer includes an organic compound, and the first buffer layer and the second buffer layer each include a metal or an organic compound. The first transistor is electrically connected to the first conductive layer of any of the first to fourth light-receiving elements. The second transistor is electrically connected to the first transistor.

公开(公告)号：US20180061307A1

公开(公告)日：2018-03-01

申请号：US15684085

申请日：2017-08-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hiroki INOUE ,  Kei TAKAHASHI

IPC: G09G3/20 ,  H03F3/45 ,  H01L27/32 ,  G09G3/36

CPC classification number: G09G3/2096 ,  G09G3/3275 ,  G09G3/3648 ,  G09G3/3677 ,  G09G3/3688 ,  G09G5/026 ,  G09G2300/0408 ,  G09G2300/046 ,  G09G2300/0871 ,  G09G2310/0286 ,  G09G2310/0291 ,  G09G2320/0666 ,  G09G2330/06 ,  G09G2340/02 ,  G09G2360/121 ,  G09G2360/144 ,  G09G2360/18 ,  G09G2370/08 ,  G09G2370/14 ,  H01L27/1225 ,  H01L27/3211 ,  H01L27/3244 ,  H03F3/195 ,  H03F3/3022 ,  H03F3/45183 ,  H03F3/45192 ,  H03F3/45219 ,  H03F3/45475 ,  H03F3/68 ,  H03F2203/45652

Abstract: The transmission delay time of a receiver for receiving a differential signal is reduced. A first amplifier circuit is provided in an input stage of the receiver, and a second amplifier circuit is provided in an output stage of the receiver. The first amplifier circuit is a differential input, differential output amplifier circuit. The second amplifier circuit is a differential input, single-ended output amplifier circuit. A first power supply voltage and a second power supply voltage are input as a high-level power supply voltage and a low-level power supply voltage to the first amplifier circuit and the second amplifier circuit, respectively. The withstand voltage of transistors of a differential pair of the first amplifier circuit is higher than the withstand voltage of another transistor included in the first amplifier circuit and a transistor included in the second amplifier circuit.

公开(公告)号：US20160218061A1

公开(公告)日：2016-07-28

申请号：US15090733

申请日：2016-04-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takanori MATSUZAKI ,  Hiroki INOUE

IPC: H01L23/528 ,  H01L27/12 ,  H01L29/786

CPC classification number: H01L23/528 ,  G11C7/1048 ,  G11C7/1051 ,  G11C11/24 ,  G11C11/40 ,  G11C11/404 ,  G11C11/56 ,  G11C11/5621 ,  G11C11/5642 ,  G11C15/00 ,  G11C15/04 ,  G11C15/046 ,  H01L27/1207 ,  H01L29/16 ,  H01L29/24 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A highly reliable semiconductor device. In a configuration where a precharged source line is discharged to a bit line by establishing electrical continuity between the source line and the bit line through a transistor to read a potential retained at a gate of the transistor, the potential of the bit line is switched in accordance with a change in potential of the source line due to the discharge. With this configuration, the voltage between the source and drain of the transistor can be kept lower than a predetermined voltage by discharge. Accordingly, the source-drain voltage of the transistor can be kept lower than its breakdown voltage, so that the semiconductor device can have high reliability.

公开(公告)号：US20160173096A1

公开(公告)日：2016-06-16

申请号：US14967553

申请日：2015-12-14

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hiroki INOUE ,  Takanori MATSUZAKI ,  Shuhei NAGATSUKA ,  Takahiko ISHIZU ,  Tatsuya ONUKI

IPC: H03K19/0185 ,  H03K19/00

CPC classification number: H03K19/018521 ,  H03K3/356104 ,  H03K19/0016

Abstract: To provide a semiconductor device that inhibits unexpected output of a high-level signal immediately after the rise of a power supply voltage. A semiconductor device includes a first buffer circuit, a level shifter circuit, and a second buffer circuit. A first potential is supplied to the first buffer circuit, and a second potential is supplied to the level shifter circuit and the second buffer circuit; consequently, the semiconductor device returns to a normal state. The first potential is supplied to the first buffer circuit before the second potential is supplied to the level shifter circuit and the second buffer circuit, whereby the operations of the level shifter circuit and the second buffer circuit can be controlled. This inhibits unexpected output of a high-level signal to a wiring connected to the second buffer circuit.

Abstract translation: 提供在电源电压上升之后立即抑制高电平信号的意外输出的半导体器件。 半导体器件包括第一缓冲电路，电平移位器电路和第二缓冲电路。 第一电位被提供给第一缓冲电路，第二电位被提供给电平移位器电路和第二缓冲电路; 因此，半导体器件返回到正常状态。 在将第二电位提供给电平移位器电路和第二缓冲电路之前，将第一电位提供给第一缓冲电路，由此可以控制电平移位器电路和第二缓冲电路的操作。 这阻止了高电平信号对连接到第二缓冲电路的布线的意外输出。

公开(公告)号：US20160155480A1

公开(公告)日：2016-06-02

申请号：US14951937

申请日：2015-11-25

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Hiroki INOUE ,  Kiyoshi KATO ,  Takanori MATSUZAKI

IPC: G11C5/10 ,  H01L27/108 ,  G11C7/12 ,  H01L27/06

CPC classification number: G11C5/10 ,  G11C7/12 ,  G11C11/405 ,  H01L21/8258 ,  H01L27/0629 ,  H01L27/0688 ,  H01L27/108 ,  H01L27/1156 ,  H01L27/1225

Abstract: A semiconductor device capable of inhibiting incorrect data readout is provided. In a memory cell including a first transistor, a second transistor, and a third transistor, the potential of a fourth wiring is set to GND when data is written, and the potential is set to VDD when data is read out, for example. Note that the potential of a third wiring is set to GND when data is written and when data is read out, for example. When data is read out, the first transistor is off, so that a first capacitor and a fourth capacitor are connected in series. The potential of a second electrode of the second capacitor increases in this state, and thus part of charges accumulated in the second capacitor transfers to the first capacitor, so that the potential of a node increases.

Abstract translation: 提供能够抑制不正确的数据读出的半导体器件。 在包括第一晶体管，第二晶体管和第三晶体管的存储单元中，例如，当数据被写入时，第四布线的电位被设置为GND，并且例如在读出数据时将电位设置为VDD。 注意，例如，当写入数据和数据被读出时，第三布线的电位被设置为GND。 当读出数据时，第一晶体管截止，使得第一电容器和第四电容器串联连接。 在该状态下，第二电容器的第二电极的电位增加，因此累积在第二电容器中的电荷的一部分转移到第一电容器，使得节点的电位增加。

公开(公告)号：US20160133660A1

公开(公告)日：2016-05-12

申请号：US14928987

申请日：2015-10-30

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hiroki INOUE ,  Yoshiyuki KUROKAWA ,  Takayuki IKEDA ,  Yuki OKAMOTO

IPC: H01L27/146 ,  H04N5/378 ,  H04N5/3745

CPC classification number: H01L27/14612 ,  H01L27/14643 ,  H01L27/14665 ,  H01L27/14692 ,  H04N5/3696 ,  H04N5/37452 ,  H04N5/37455 ,  H04N5/378

Abstract: To provide an imaging device capable of obtaining high-quality imaging data. The imaging device includes a first circuit and a second circuit. The first circuit includes a photoelectric conversion element, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a first capacitor, a second capacitor, and a third capacitor. The second circuit includes a seventh transistor. The imaging device can compensate variation in electrical characteristics of an amplifier transistor included in the first circuit.

Abstract translation: 提供能够获得高质量成像数据的成像装置。 成像装置包括第一电路和第二电路。 第一电路包括光电转换元件，第一晶体管，第二晶体管，第三晶体管，第四晶体管，第五晶体管，第六晶体管，第一电容器，第二电容器和第三电容器。 第二电路包括第七晶体管。 成像装置可以补偿包括在第一电路中的放大器晶体管的电特性的变化。

公开(公告)号：US20160064444A1

公开(公告)日：2016-03-03

申请号：US14837791

申请日：2015-08-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hiroki INOUE ,  Yoshiyuki KUROKAWA ,  Takayuki IKEDA ,  Yuki OKAMOTO

IPC: H01L27/146 ,  H01L29/24 ,  H01L29/786

CPC classification number: H01L27/14612 ,  H01L27/14614 ,  H01L27/14689 ,  H01L27/14692 ,  H01L29/24 ,  H01L29/7869

Abstract: An imaging device capable of obtaining high-quality imaging data is provided. The imaging device includes a first circuit, a second circuit and a third circuit. The first circuit includes a photoelectric conversion element, a plurality of transistors including an amplifier transistor, and a plurality of capacitors. The second circuit includes a transistor. The third circuit includes a resistor and a transistor for controlling a current flowing in the resistor. The output signal of the imaging device is determined in accordance with the current flowing in the resistor. Variations in electrical characteristics of the amplifier transistor included in the first circuit can be compensated.

Abstract translation: 提供能够获得高质量成像数据的成像装置。 成像装置包括第一电路，第二电路和第三电路。 第一电路包括光电转换元件，包括放大器晶体管的多个晶体管和多个电容器。 第二电路包括晶体管。 第三电路包括用于控制在电阻器中流动的电流的电阻器和晶体管。 成像装置的输出信号根据流过电阻器的电流来确定。 可以补偿包括在第一电路中的放大器晶体管的电特性的变化。

公开(公告)号：US20250168527A1

公开(公告)日：2025-05-22

申请号：US19029199

申请日：2025-01-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takeya HIROSE ,  Seiichi YONEDA ,  Hiroki INOUE ,  Takayuki IKEDA ,  Shunpei YAMAZAKI

IPC: H04N25/705 ,  H04N25/77 ,  H04N25/78

Abstract: An imaging device having a function of processing an image is provided. The imaging device has an additional function such as image processing, can hold analog data obtained by an image capturing operation in a pixel, and can extract data obtained by multiplying the analog data by a predetermined weight coefficient. Difference data between adjacent light-receiving devices can be obtained in a pixel, and data on luminance gradient can be obtained. When the data is taken in a neural network or the like, inference of distance data or the like can be performed. Since enormous volume of image data in the state of analog data can be held in pixels, processing can be performed efficiently.