公开(公告)号：US20240105731A1

公开(公告)日：2024-03-28

申请号：US18238124

申请日：2023-08-25

Applicant: Sharp Display Technology Corporation

Inventor： Kuniaki OKADA ,  Shinpei HIGASHIDA

IPC: H01L27/12 ,  G02F1/1362

CPC classification number: H01L27/1218 ,  G02F1/136286 ,  G02B27/0172

Abstract: An active matrix substrate includes a substrate and a plurality of pixels located on the substrate. Each of the pixels includes an oxide semiconductor layer, a first insulator covering the oxide semiconductor layer, a first contact hole located at the first insulator, a first extraction electrode located on the first insulator and in the first contact hole, and connected to the oxide semiconductor layer, a second insulator covering the first extraction electrode, a second contact hole located at the second insulator, a second extraction electrode located on the second insulator and in the second contact hole, and connected to the first extraction electrode, and a pixel electrode connected to the second extraction electrode. The first and second extraction electrodes are light-transmissive, and a portion of a side surface of at least one of the first and second contact holes is not covered with the first and second extraction electrodes.

公开(公告)号：US20230161210A1

公开(公告)日：2023-05-25

申请号：US17978312

申请日：2022-11-01

Applicant: Sharp Display Technology Corporation

Inventor： Atsushi HACHIYA ,  Hiroaki FURUKAWA ,  Yuhichi SAITOH ,  Kuniaki OKADA

IPC: G02F1/1368 ,  G02F1/1343 ,  G02F1/1362 ,  H01L27/12

CPC classification number: G02F1/1368 ,  G02F1/134309 ,  G02F1/136286 ,  H01L27/124 ,  G02F1/133345

Abstract: An active matrix substrate includes a first TFT disposed in each of pixel regions, a first flattened layer covering the first TFT, and a pixel electrode provided on the first flattened layer. The first TFT includes a lower gate electrode, a lower gate insulating layer, an oxide semiconductor layer, an upper gate insulating layer, and an upper gate electrode. The active matrix substrate further includes a first connection electrode for electrically connecting a drain contact region of the oxide semiconductor layer and the pixel electrode. The first flattened layer includes a pixel contact hole formed so as to expose a part of the first connection electrode. The bottom face of the pixel contact hole at least partially overlaps, of a lower gate metal layer including a lower gate electrode and an upper gate metal layer including an upper gate electrode, at least the lower gate metal layer when viewed from the normal direction of the substrate. The first connection electrode is formed from a transparent conductive material.

公开(公告)号：US20250107235A1

公开(公告)日：2025-03-27

申请号：US18783476

申请日：2024-07-25

Applicant: Sharp Display Technology Corporation

Inventor： Seiichi UCHIDA ,  Kuniaki OKADA

IPC: H01L27/12 ,  G02F1/1343 ,  G02F1/1362

Abstract: An array substrate includes a first line, a second line crossing the first line, a semiconductor section made of semiconductor material, extending to cross the first line, and including a first end portion overlapping the second line and a second end portion, a first insulation film between the first line and the semiconductor section, a first electrode being a portion of the first line and overlapping the semiconductor section via the first insulation film, a second electrode being a portion of the second line and overlapping the semiconductor section and being connected to the semiconductor section, and a third electrode disposed to overlap the second end portion of the semiconductor section and connected to the semiconductor section. The semiconductor section includes a resistance lowered section not overlapping the first electrode and a first overlapping portion overlapping a portion of the first electrode and a portion of the second line.

公开(公告)号：US20240103311A1

公开(公告)日：2024-03-28

申请号：US18233537

申请日：2023-08-14

Applicant: Sharp Display Technology Corporation

Inventor： Seiichi UCHIDA ,  Kuniaki OKADA ,  Keisuke YOSHIDA

IPC: G02F1/1335 ,  G02F1/1339

CPC classification number: G02F1/133512 ,  G02F1/1339

Abstract: Provided are a liquid crystal panel which has good visibility and in which a decrease in the display quality is sufficiently suppressed, and a head mounted display and a liquid crystal display device using the same. The liquid crystal panel includes a liquid crystal layer, a spacer, and a light-shielding section between a first substrate a second substrate facing the first substrate. The light-shielding section includes column-direction light-shielding sections arranged in a column direction and shielding parts between the pixels aligned in a row direction from light, and row-direction light-shielding sections arranged in the row direction and shielding parts between the pixels aligned in the column direction from light. The row-direction light-shielding sections include one that includes a first light-shielding section including an arrangement region of the spacer and a second light-shielding section adjacent to the first light-shielding section in the column direction.

公开(公告)号：US20250013111A1

公开(公告)日：2025-01-09

申请号：US18712249

申请日：2022-11-11

Applicant: Sharp Display Technology Corporation

Inventor： Kuniaki OKADA ,  Atsushi HACHIYA

IPC: G02F1/1368 ,  G02F1/1362 ,  H01L27/12

Abstract: An active matrix substrate includes, in order, a pixel TFT including an oxide semiconductor layer, a first interlayer insulating layer covering the oxide semiconductor layer and a gate electrode, a first organic insulating layer, and a pixel electrode. A first pixel contact hole is formed in the first interlayer insulating layer, and a second pixel contact hole is formed in the first organic insulating layer. The pixel electrode is made of a transparent conductive material, a first electrode layer includes a first portion in contact with a drain contact region of the oxide semiconductor layer in the first pixel contact hole and a second portion located in the second pixel contact hole, a second electrode layer includes a third portion in contact with the second portion and a fourth portion located on the first organic insulating layer, and a third electrode layer includes a fifth portion in contact with the fourth portion and a sixth portion located on the second organic insulating layer. A length of the second electrode layer in a row direction is less than or equal to a length of the third electrode layer in the row direction. The active matrix substrate further includes a second organic insulating layer filling the second pixel contact hole.

公开(公告)号：US20240427203A1

公开(公告)日：2024-12-26

申请号：US18676704

申请日：2024-05-29

Applicant: Sharp Display Technology Corporation

Inventor： Keisuke YOSHIDA ,  Kuniaki OKADA ,  Hiromi KATOH ,  Seiichi UCHIDA

IPC: G02F1/1362 ,  G02B27/01

Abstract: The present invention provides a liquid crystal panel capable of suppressing an occurrence of oblique color mixing, having excellent transmittance, and meeting the need for higher definition. The present invention also provides a liquid crystal display device and a head mounted display device including the liquid crystal panel. The liquid crystal panel includes: a first substrate having a plurality of pixels arranged in a matrix; a second substrate facing the first substrate; and a liquid crystal layer located between the first substrate and the second substrate. The first substrate includes a support substrate, a plurality of source lines, a plurality of gate lines, and a plurality of switching elements. Each of the pixels is defined by two gate lines adjacent to each other and two source lines adjacent to each other, and includes a pixel electrode and a color filter layer.

公开(公告)号：US20230375889A1

公开(公告)日：2023-11-23

申请号：US18197014

申请日：2023-05-12

Applicant: Sharp Display Technology Corporation

Inventor： Seiichi UCHIDA ,  Kiyoshi MINOURA ,  Kuniaki OKADA ,  Hiromi KATOH ,  Keisuke YOSHIDA

IPC: G02F1/1368 ,  G02F1/1362

CPC classification number: G02F1/1368 ,  G02F1/136222 ,  G02F1/136227 ,  G02F1/136209

Abstract: An active matrix substrate includes a substrate that is transparent, and a plurality of pixels positioned on the substrate. Each pixel includes a thin-film transistor (TFT) positioned on the substrate, a first color filter layer disposed on the substrate so as to cover the TFT, a contact hole being provided in the first color filter layer, a pixel electrode that is positioned on a bottom face and a side face of the contact hole, and on the first color filter layer, and that is electrically connected to the TFT via the contact hole, and a second color filter layer disposed within the contact hole.