公开(公告)号：US20240257774A1

公开(公告)日：2024-08-01

申请号：US18529438

申请日：2023-12-05

Applicant: Sharp Display Technology Corporation

Inventor： Jun NISHIMURA ,  Yoshihito Hara ,  Masaki Maeda ,  Yoshiharu Hirata ,  Hideki Kitagawa ,  Masamitsu Yamanaka ,  Tohru Daitoh

IPC: G09G3/34 ,  G11C19/28

CPC classification number: G09G3/3446 ,  G11C19/28 ,  G09G2300/0426 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/08

Abstract: In each of unit circuits that constitute a shift register, a first conduction terminal of a second thin-film transistor that controls the output of an output signal serving as a scanning signal is given a second input clock signal having a amplitude larger than the amplitude of a first input clock signal that is given to a first conduction terminal of a first thin-film transistor that controls the output of an output signal serving as a control signal for controlling another unit circuit. The channel length of the second thin-film transistor is set to be greater than the channel length of the first thin-film transistor, so that the breakdown voltage of the second thin-film transistor is higher than the breakdown voltage of the first thin-film transistor.