公开(公告)号：US20250085599A1

公开(公告)日：2025-03-13

申请号：US18791409

申请日：2024-07-31

Applicant: Sharp Display Technology Corporation

Inventor： Shuji NISHI ,  Keiichi INA

IPC: G02F1/1362 ,  G02F1/1333 ,  G02F1/1337 ,  G02F1/1368

Abstract: A liquid crystal display device includes a first substrate, a second substrate, and a liquid crystal layer provided between the first substrate and the second substrate, and has pixels. Each pixel includes a reflective region in which to perform a display in a reflective mode. The first substrate includes a substrate, gate lines extending in a row-wise direction, source lines extending in a column-wise direction, thin-film transistors provided separately in correspondence with each pixel, pixel electrodes each electrically connected to a thin-film transistor, and a reflective layer provided between the pixel electrodes and the substrate. The first substrate further includes touch sensor electrodes and touch lines each electrically connected to a touch sensor electrode. The touch lines are formed from a conducting film that is identical to that from which the source lines are formed, and are provided between the reflective layer and the substrate.

公开(公告)号：US20230386424A1

公开(公告)日：2023-11-30

申请号：US18144063

申请日：2023-05-05

Applicant: Sharp Display Technology Corporation

Inventor： Yasushi SASAKI ,  Yuhichiroh MURAKAMI ,  Shuji NISHI ,  Takahiro YAMAGUCHI

IPC: G09G3/36

CPC classification number: G09G3/3629 ,  G09G3/3614 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0842 ,  G09G2310/0291 ,  G09G2310/0278 ,  G09G2330/021

Abstract: When binary pixel data is written to a pixel circuit, of an H-level (3V) and a L-level (0V), a voltage of the level indicating the binary pixel data is held at a first node, and a voltage of the inverted level thereof is held at a second node. The first and second nodes are connected to a third node via N-channel transistors, respectively, and first and second selection control signals are supplied to gate terminals of the transistors, respectively. Voltage levels of the first and second selection control signals are periodically switched between 5V indicating the H-level and 0V indicating the L-level in a mutually inverted manner. As a result, the voltage of the first node and the voltage of the second node are alternately selected and applied to a pixel electrode of a display element.