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公开(公告)号:US20220246104A1
公开(公告)日:2022-08-04
申请号:US17539515
申请日:2021-12-01
Applicant: Sharp Display Technology Corporation
Inventor: Yasushi SASAKI , Shige FURUTA , Yuhichiroh MURAKAMI , Hidekazu YAMANAKA , Hiroyuki ADACHI
Abstract: A signal obtained through sampling a gate start pulse signal GSP by using one of a plurality of gate clock signals is supplied as a shift pulse for a forward shift action (a forward shift start pulse signal) to the first stage of a plurality of stages constituting a bidirectional shift register, and a signal obtained through sampling the gate start pulse signal GSP by using another one of the plurality of gate clock signals is supplied as a shift pulse for a backward shift action (a backward shift start pulse signal) to the last stage of the plurality of stages constituting the bidirectional shift register.
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公开(公告)号:US20230386424A1
公开(公告)日:2023-11-30
申请号:US18144063
申请日:2023-05-05
Applicant: Sharp Display Technology Corporation
Inventor: Yasushi SASAKI , Yuhichiroh MURAKAMI , Shuji NISHI , Takahiro YAMAGUCHI
IPC: G09G3/36
CPC classification number: G09G3/3629 , G09G3/3614 , G09G3/3677 , G09G3/3688 , G09G2300/0842 , G09G2310/0291 , G09G2310/0278 , G09G2330/021
Abstract: When binary pixel data is written to a pixel circuit, of an H-level (3V) and a L-level (0V), a voltage of the level indicating the binary pixel data is held at a first node, and a voltage of the inverted level thereof is held at a second node. The first and second nodes are connected to a third node via N-channel transistors, respectively, and first and second selection control signals are supplied to gate terminals of the transistors, respectively. Voltage levels of the first and second selection control signals are periodically switched between 5V indicating the H-level and 0V indicating the L-level in a mutually inverted manner. As a result, the voltage of the first node and the voltage of the second node are alternately selected and applied to a pixel electrode of a display element.
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