公开(公告)号：US20220304157A1

公开(公告)日：2022-09-22

申请号：US17831301

申请日：2022-06-02

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Lung-Yuan WANG ,  Wen-Liang Lien

IPC: H05K1/14 ,  H05K1/18 ,  H01L23/31 ,  H05K3/32 ,  H05K1/11

Abstract: A method for fabricating an assemble substrate is provided, including stacking a circuit portion on a plurality of circuit members. The circuit members are spaced apart from one another in a current packaging process to increase a layer area. The assemble substrate thus fabricated meets the requirements for a packaging substrate of a large size, and has a high yield and low fabrication cost.

公开(公告)号：US20210051800A1

公开(公告)日：2021-02-18

申请号：US16589663

申请日：2019-10-01

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Lung-Yuan Wang ,  Wen-Liang Lien

IPC: H05K1/14 ,  H05K1/18 ,  H05K3/32 ,  H01L23/31

Abstract: A method for fabricating an assemble substrate is provided, including stacking a circuit portion on a plurality of circuit members. The circuit members are spaced apart from one another in a current packaging process to increase a layer area. The assemble substrate thus fabricated meets the requirements for a packaging substrate of a large size, and has a high yield and low fabrication cost.

公开(公告)号：US12114427B2

公开(公告)日：2024-10-08

申请号：US17831301

申请日：2022-06-02

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Lung-Yuan Wang ,  Wen-Liang Lien

IPC: H05K3/32 ,  H01L23/31 ,  H05K1/11 ,  H05K1/14 ,  H05K1/18 ,  H05K3/46 ,  H05K1/02

CPC classification number: H05K1/144 ,  H01L23/3157 ,  H05K1/111 ,  H05K1/181 ,  H05K3/32 ,  H05K3/4682 ,  H05K1/0203 ,  H05K2201/042

Abstract: A method for fabricating an assemble substrate is provided, including stacking a circuit portion on a plurality of circuit members. The circuit members are spaced apart from one another in a current packaging process to increase a layer area. The assemble substrate thus fabricated meets the requirements for a packaging substrate of a large size, and has a high yield and low fabrication cost.

公开(公告)号：US11382214B2

公开(公告)日：2022-07-05

申请号：US16589663

申请日：2019-10-01

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Lung-Yuan Wang ,  Wen-Liang Lien

IPC: H05K1/14 ,  H05K1/11 ,  H05K1/18 ,  H01L23/31 ,  H05K3/32 ,  H05K1/02

Abstract: A method for fabricating an assemble substrate is provided, including stacking a circuit portion on a plurality of circuit members. The circuit members are spaced apart from one another in a current packaging process to increase a layer area. The assemble substrate thus fabricated meets the requirements for a packaging substrate of a large size, and has a high yield and low fabrication cost.