Panel Representation and Distortion Reduction In 360 Panorama Images

    公开(公告)号:US20240386528A1

    公开(公告)日:2024-11-21

    申请号:US18666438

    申请日:2024-05-16

    Abstract: This disclosure relates generally to image processing and specifically to processing panorama images using neural networks to generate depth maps, layouts, semantic maps or the like with reduced distortion and improved continuity. Methods and systems are described for generating such maps by leveraging several essential properties of these panorama images and by using a panorama panel representation and a neural network framework. A panel geometry embedding network is incorporated for encoding both the local and global geometric features of the panels in order to reduce negative impact of panoramic distortion. A local-to-global transformer network is also incorporated for capturing geometric context and aggregating local information within a panel and panel-wise global context.

    METHOD AND APPARATUS FOR GENERATING A FLOOR PLAN

    公开(公告)号:US20220358694A1

    公开(公告)日:2022-11-10

    申请号:US17502520

    申请日:2021-10-15

    Abstract: Aspects of the disclosure include methods, apparatuses, and non-transitory computer-readable storage mediums for generating a floor plan from a point cloud model. An apparatus includes processing circuitry that receives an input three-dimensional point cloud corresponding to a three-dimensional space. The processing circuitry determines a plurality of wall planes in the received input three-dimensional point cloud. The processing circuitry generates a plurality of line segments. Each line segment is generated by projecting a respective wall plane of the plurality of wall planes to a floor plane in the three-dimensional space. The processing circuitry represents the plurality of wall planes in the three-dimensional space using the plurality of line segments in a two-dimensional space corresponding to the floor plan. The processing circuitry adjusts the plurality of line segments in the two-dimensional space to improve the floor plan. The processing circuitry generates the floor plan based on the plurality of adjusted line segments.

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