LOCOS FILLET FOR DRAIN REDUCED BREAKDOWN IN HIGH VOLTAGE TRANSISTORS

    公开(公告)号:US20240178318A1

    公开(公告)日:2024-05-30

    申请号:US18072201

    申请日:2022-11-30

    Abstract: An integrated circuit includes a source region and a drain region spaced apart and extending into a semiconductor layer. A gate electrode extends between the source and the drain regions, and a dielectric layer is between the gate electrode and the semiconductor layer. The dielectric layer includes a first portion having a first thickness and a second portion having a second greater second thickness and a lateral perimeter surrounding the source region. The lateral perimeter includes a first edge having a first linear segment extending between the source region and the drain region along a first direction and a second edge having a second linear segment extending over the semiconductor layer along a different second direction. A fillet of the second portion connects the first linear segment and the second linear segment of the lateral perimeter.

Patent Agency Ranking