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1.发明申请公开(公告)号：US20170317050A1
公开(公告)日：2017-11-02
申请号：US15521886
申请日：2015-11-03
Applicant: The Regents of the University of California
Inventor： Shadi A. Dayeh , Renjie Chen
IPC: H01L23/00 , H01S5/02 , H01L27/06 , G02B6/13 , H01L21/8252
CPC classification number: H01L24/83 , G02B6/13 , H01L21/185 , H01L21/187 , H01L21/28575 , H01L21/8252 , H01L21/8258 , H01L24/29 , H01L27/0605 , H01L2224/29082 , H01L2224/29155 , H01L2224/29164 , H01L2224/29166 , H01L2224/29171 , H01L2224/29184 , H01L2224/29187 , H01L2224/83203 , H01L2224/8383 , H01L2924/05042 , H01L2924/05432 , H01L2924/05442 , H01L2924/20107 , H01S5/0215
Abstract: A method for integrating III-V semiconductor materials onto a rigid host substrate deposits a thin layer of reactive metal film on the rigid host substrate. The layer can also include a separation layer of unreactive metal or dielectric, and can be patterned. The unreactive metal pattern can create self-aligned device contacts after bonding is completed. The III-V semiconductor material is brought into contact with the thin layer of reactive metal. Bonding is by a low temperature heat treatment under a compressive pressure. The reactive metal and the functional semiconductor material are selected to undergo solid state reaction and form a stable alloy under the low temperature heat treatment without degrading the III-V material. A semiconductor device of the invention includes a functional III-V layer bonded to a rigid substrate via an alloy of a component of the functional III-V layer and a metal that bonds to the rigid substrate.
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2.发明公开公开(公告)号：US20240131339A1
公开(公告)日：2024-04-25
申请号：US18547999
申请日：2022-03-10
Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
Inventor： Shadi A. Dayeh , Youngbin Tchoe , Andrew M. Bourhis
CPC classification number: A61N1/36125 , A61N1/0531 , H05K1/113 , H05K1/181 , H05K3/32 , H05K2201/041 , H05K2201/10325 , H05K2201/10378 , H05K2203/0384 , H05K2203/1305
Abstract: A flexible electrode array with hundreds or thousands channels for clinical use includes an array of at least hundreds of electrodes on a flexible biocompatible polymer substrate. Perfusion through holes are provided through the substrate. Individual elongate leads connect to each of the electrodes, the elongate lead connections being supported by the flexible biocompatible polymer substrate and extending away from the array. Flexible biocompatible polymer insulates the individual elongate lead connections and supporting the array. An interposer with individual channel connections is conductively bonded to the individual elongate lead connections. Sterile bag packaging encloses a portion of the interposer, where the outer side of the package including the array and individual elongate lead is sterile while the inner side of the packaging is non-sterile. The portion interposer inside the package is configured to connect to a circuit board within the packaging.
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3.发明授权公开(公告)号：US11056517B2
公开(公告)日：2021-07-06
申请号：US15556542
申请日：2016-03-10
Applicant: The Regents of the University of California
Inventor： Shadi A. Dayeh , Yun Goo Ro , Namseok Park , Atsunori Tanaka , Siarhei Vishniakou , Ahmed Youssef , James Buckwalter , Cooper Levy
IPC: B81C1/00 , H01L31/0352 , H01L31/047 , H01L31/042 , H01L27/142 , A61B5/00 , A61B5/318 , A61B5/369 , A61B5/389
Abstract: Methods and devices that monolithically integrate thin film elements/devices, e.g., environmental sensors, batteries and biosensors, with high performance integrated circuits, i.e., integrated circuits formed in a high quality device layer. Preferred embodiments further monolithically integrate a solar cell array. Preferred embodiments provide pin-size and integrated solar powered wearable electronic, ionic, molecular, radiation, etc. sensors and circuits.
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公开(公告)号：US20200295170A1
公开(公告)日：2020-09-17
申请号：US16759653
申请日：2018-10-31
Applicant: The Regents of the University of California
Inventor： Shadi A. Dayeh , Woojin Choi , Renjie Chen , Atsunori Tanaka , Ren Liu
IPC: H01L29/778 , H01L29/20 , H01L29/78
Abstract: Devices and methods of the invention use a plurality of Fin structures and or combine a planar portion with Fin structures to compensate for the first derivative of transconductance, gm. In preferred methods and devices, Fins have a plurality of widths and are selected to lead to the separate turn-on voltage thresholds for the largest, intermediate and smallest widths of the MIS HEMT fins flatten the transconductance gm curve over an operational range of gate source voltage.
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5.发明公开公开(公告)号：US20240226565A9
公开(公告)日：2024-07-11
申请号：US18547999
申请日：2022-03-10
Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
Inventor： Shadi A. Dayeh , Youngbin Tchoe , Andrew M. Bourhis
CPC classification number: A61N1/36125 , A61N1/0531 , H05K1/113 , H05K1/181 , H05K3/32 , H05K2201/041 , H05K2201/10325 , H05K2201/10378 , H05K2203/0384 , H05K2203/1305
Abstract: A flexible electrode array with hundreds or thousands channels for clinical use includes an array of at least hundreds of electrodes on a flexible biocompatible polymer substrate. Perfusion through holes are provided through the substrate. Individual elongate leads connect to each of the electrodes, the elongate lead connections being supported by the flexible biocompatible polymer substrate and extending away from the array. Flexible biocompatible polymer insulates the individual elongate lead connections and supporting the array. An interposer with individual channel connections is conductively bonded to the individual elongate lead connections. Sterile bag packaging encloses a portion of the interposer, where the outer side of the package including the array and individual elongate lead is sterile while the inner side of the packaging is non-sterile. The portion interposer inside the package is configured to connect to a circuit board within the packaging.
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Patent Agency Ranking
公开(公告)号：US11233142B2
公开(公告)日：2022-01-25
申请号：US16759653
申请日：2018-10-31
Applicant: The Regents of the University of California
Inventor： Shadi A. Dayeh , Woojin Choi , Renjie Chen , Atsunori Tanaka , Ren Liu
IPC: H01L29/778 , H01L29/20 , H01L29/78
Abstract: Devices and methods of the invention use a plurality of Fin structures and or combine a planar portion with Fin structures to compensate for the first derivative of transconductance, gm. In preferred methods and devices, Fins have a plurality of widths and are selected to lead to the separate turn-on voltage thresholds for the largest, intermediate and smallest widths of the MIS HEMT fins flatten the transconductance gm curve over an operational range of gate source voltage.
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公开(公告)号：US20210371987A1
公开(公告)日：2021-12-02
申请号：US17291236
申请日：2019-11-07
Applicant: The Regents of the University of California
Inventor： Shadi A. Dayeh , Mehran Ganji
Abstract: A method for fabricating a Pt nanorod electrode array sensor device includes forming planar metal electrodes on a flexible film, co-depositing Pt alloy on the planar metal electrodes via physical vapor deposition, and dealloying the Pt alloy to etch Pt nanorods from the deposited Pt alloy. A Pt nanorod electrode sensor device includes a plurality of porous Pt nanorods on a planar metal electrode forming a sensor electrode. The planar metal electrode is on a flexible substrate. An electrode lead on the flexible substrate extends away from the planar metal electrode. Insulation is around porous Pt nanorods an upon the electrode lead.
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公开(公告)号：US20250090073A1
公开(公告)日：2025-03-20
申请号：US18882087
申请日：2024-09-11
Applicant: The Regents of the University of California
Inventor： Shadi A. Dayeh , Yun Goo Ro , Keundong Lee
Abstract: A microelectrode probe device includes multiple layers of biocompatible polymer films formed in an elongate shape. Micro-electrode recording conductive sites and macro-electrode conductive stimulation sites are exposed from the polymer films near a first terminal end of the elongate shape. Insulated electrical traces within the polymer films are connected to the micro-electrode recording conductive sites and macro-electrode conductive stimulation sites. An elongate hollow within the multiple layers of polymer films extends to micro-electrode recording conductive sites and macro-electrode conductive stimulation sites. The elongated hollow being configured to accommodate a removable stainless-steel stylet. The stainless-steel stylet permits implantation with the probe device wrapped around it, and the stylet can be removed.
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公开(公告)号：US11363979B2
公开(公告)日：2022-06-21
申请号：US16069783
申请日：2017-01-19
Applicant: The Regents of the University of California
Inventor： Shadi A. Dayeh , Renjie Chen , Sang Heon Lee , Ren Liu , Yun Goo Ro , Atsunori Tanaka , Yoontae Hwang
IPC: A61B5/24 , B81B1/00 , B81C1/00 , G01N33/483 , B82Y15/00
Abstract: A nanowire probe sensor array including a substrate with a metal pattern thereon. An array of semiconductor vertical nanowire probes extends away from the substrate, and at least some of probes, and preferably all, are individually electrically addressed through the metal pattern. The metal pattern is insulated with dielectric, and base and stem portions of the nanowires are also preferably insulated. A fabrication process patterns metal connections on a substrate. A semiconductor substrate is bonded to the metal pattern. The semiconductor substrate is etched to form the neural nanowire probes that are bonded to the metal pattern. Dielectric is then deposited to insulate the metal pattern.
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10.发明申请公开(公告)号：US20180040649A1
公开(公告)日：2018-02-08
申请号：US15556542
申请日：2016-03-10
Applicant: The Regents of the University of California
Inventor： Shadi A. Dayeh , Yun Goo Ro , Namseok Park , Atsunori Tanaka , Siarhei Vishniakou , Ahmed Youssef , James Buckwalter , Cooper Levy
IPC: H01L27/142 , A61B5/00 , B81C1/00 , H01L31/042
CPC classification number: H01L27/142 , A61B5/0402 , A61B5/0476 , A61B5/0488 , A61B5/6802 , A61B2560/0214 , A61B2562/028 , A61B2562/125 , A61B2562/164 , B81B2201/0214 , B81C1/00238 , B81C2203/0792 , H01L31/035227 , H01L31/035281 , H01L31/042 , H01L31/047
Abstract: Methods and devices that monolithically integrate thin film elements/devices, e.g., environmental sensors, batteries and biosensors, with high performance integrated circuits, i.e., integrated circuits formed in a high quality device layer. Preferred embodiments further monolithically integrate a solar cell array. Preferred embodiments provide pin-size and integrated solar powered wearable electronic, ionic, molecular, radiation, etc. sensors and circuits.
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