Multi-layer trench capacitor structure

    公开(公告)号:US11916100B2

    公开(公告)日:2024-02-27

    申请号:US17699649

    申请日:2022-03-21

    CPC classification number: H01L28/75 H01L27/0733 H01L28/91 H01L28/92 H01L29/945

    Abstract: The present disclosure relates to an integrated chip including a dielectric structure over a substrate. A first capacitor is disposed between sidewalls of the dielectric structure. The first capacitor includes a first electrode between the sidewalls of the dielectric structure and a second electrode between the sidewalls and over the first electrode. A second capacitor is disposed between the sidewalls. The second capacitor includes the second electrode and a third electrode between the sidewalls and over the second electrode. A third capacitor is disposed between the sidewalls. The third capacitor includes the third electrode and a fourth electrode between the sidewalls and over the third electrode. The first capacitor, the second capacitor, and the third capacitor are coupled in parallel by a first contact on a first side of the first capacitor and a second contact on a second side of the first capacitor.

    METAL-INSULATOR-METAL DEVICE CAPACITANCE ENHANCEMENT

    公开(公告)号:US20230307492A1

    公开(公告)日:2023-09-28

    申请号:US17703150

    申请日:2022-03-24

    Abstract: In some embodiments, the present application provides an integrated chip (IC). The IC includes a metal-insulator-metal (MIM) device disposed over a substrate. The MIM device includes a plurality of conductive plates that are spaced from one another. The MIM device further includes a first conductive plug structure that is electrically coupled to a first conductive plate and to a third conductive plate of the plurality of conductive plates. A first plurality of insulative segments electrically isolate a second conductive plate and a fourth conductive plate from the first conductive plug structure. The MIM device further includes a second conductive plug structure that is electrically coupled to the second conductive plate and to the fourth conductive plate of the plurality of conductive plates. A second plurality of insulative segments electrically isolate the first conductive plate and the third conductive plate from the second conductive plug structure.

    Apparatus and Method for Reducing Optical Cross-Talk in Image Sensors
    10.
    发明申请
    Apparatus and Method for Reducing Optical Cross-Talk in Image Sensors 有权
    减少图像传感器中光交叉的装置和方法

    公开(公告)号:US20170040378A1

    公开(公告)日:2017-02-09

    申请号:US15295703

    申请日:2016-10-17

    Abstract: A method includes forming a plurality of pixels formed on a front surface of a semiconductor substrate, forming an array of color filters over the plurality of pixels, each color filter being adapted for allowing a wavelength of light radiation to reach at least one of the plurality of pixels, forming a plurality of micro-lenses over the array of color filters, and forming a second layer between the pixels and the color filters. The second layer further includes a structure adapted for blocking light radiation that is traveling towards a region between adjacent micro-lens, further wherein the plurality of micro-lenses are in contact with the array of color filters, and wherein the structure and the transparent material are coplanar at respective top surfaces thereof, and further wherein the structure directly contacts a bottom surface of at least one of the color filters.

    Abstract translation: 一种方法包括形成在半导体衬底的前表面上形成的多个像素,在多个像素上形成滤色器阵列,每个滤色器适于允许光辐射的波长到达多个像素中的至少一个 的像素,在滤色器阵列上形成多个微透镜,以及在像素和滤色器之间形成第二层。 第二层还包括适于阻挡朝向相邻微透镜之间的区域传播的光辐射的结构,其中多个微透镜与滤色器阵列接触,并且其中该结构和透明材料 在其各自的顶表面处共面,并且其中该结构直接接触至少一个滤色器的底表面。

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